linux-kernel - Re: [PATCH V3 2/8] dt-bindings: clock: qcom: Add SM8650 video clock controller

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Message-ID: <c55b7cdf-5ff2-42fb-8611-d9492f37d4b1@linaro.org>
Date: Wed, 1 May 2024 11:41:28 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Jagadeesh Kona <quic_jkona@...cinc.com>,
 Bjorn Andersson <andersson@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Konrad Dybcio
 <konrad.dybcio@...aro.org>,
 Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
Cc: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 Taniya Das <quic_tdas@...cinc.com>,
 Satya Priya Kakitapalli <quic_skakitap@...cinc.com>,
 Ajit Pandey <quic_ajipan@...cinc.com>,
 Imran Shaik <quic_imrashai@...cinc.com>
Subject: Re: [PATCH V3 2/8] dt-bindings: clock: qcom: Add SM8650 video clock
 controller

On 30/04/2024 15:27, Jagadeesh Kona wrote:
> SM8650 video clock controller has most clocks same as SM8450,
> but it also has few additional clocks and resets. Add device tree
> bindings for the video clock controller on Qualcomm SM8650 platform
> by defining these additional clocks and resets on top of SM8450.
> 
> Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
> ---
>   .../bindings/clock/qcom,sm8450-videocc.yaml   |  6 ++++-
>   .../dt-bindings/clock/qcom,sm8650-videocc.h   | 23 +++++++++++++++++++
>   2 files changed, 28 insertions(+), 1 deletion(-)
>   create mode 100644 include/dt-bindings/clock/qcom,sm8650-videocc.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
> index 78a1bb5be878..922e95c61778 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml
> @@ -8,18 +8,22 @@ title: Qualcomm Video Clock & Reset Controller on SM8450
>   
>   maintainers:
>     - Taniya Das <quic_tdas@...cinc.com>
> +  - Jagadeesh Kona <quic_jkona@...cinc.com>
>   
>   description: |
>     Qualcomm video clock control module provides the clocks, resets and power
>     domains on SM8450.
>   
> -  See also:: include/dt-bindings/clock/qcom,sm8450-videocc.h
> +  See also::
> +    include/dt-bindings/clock/qcom,sm8450-videocc.h
> +    include/dt-bindings/clock/qcom,sm8650-videocc.h
>   
>   properties:
>     compatible:
>       enum:
>         - qcom,sm8450-videocc
>         - qcom,sm8550-videocc
> +      - qcom,sm8650-videocc
>   
>     reg:
>       maxItems: 1
> diff --git a/include/dt-bindings/clock/qcom,sm8650-videocc.h b/include/dt-bindings/clock/qcom,sm8650-videocc.h
> new file mode 100644
> index 000000000000..4e3c2d87280f
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,sm8650-videocc.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8650_H
> +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8650_H
> +
> +#include "qcom,sm8450-videocc.h"
> +
> +/* SM8650 introduces below new clocks and resets compared to SM8450 */
> +
> +/* VIDEO_CC clocks */
> +#define VIDEO_CC_MVS0_SHIFT_CLK					12
> +#define VIDEO_CC_MVS0C_SHIFT_CLK				13
> +#define VIDEO_CC_MVS1_SHIFT_CLK					14
> +#define VIDEO_CC_MVS1C_SHIFT_CLK				15
> +#define VIDEO_CC_XO_CLK_SRC					16
> +
> +/* VIDEO_CC resets */
> +#define VIDEO_CC_XO_CLK_ARES					7
> +
> +#endif

Extensibility +1

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>