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Message-Id: <20240501121742.1215792-6-sunilvl@ventanamicro.com>
Date: Wed,  1 May 2024 17:47:30 +0530
From: Sunil V L <sunilvl@...tanamicro.com>
To: linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	linux-acpi@...r.kernel.org,
	linux-pci@...r.kernel.org,
	linux-serial@...r.kernel.org,
	acpica-devel@...ts.linux.dev
Cc: Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	"Rafael J . Wysocki" <rafael@...nel.org>,
	Len Brown <lenb@...nel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Anup Patel <anup@...infault.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Samuel Holland <samuel.holland@...ive.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>,
	Robert Moore <robert.moore@...el.com>,
	Conor Dooley <conor.dooley@...rochip.com>,
	Andrew Jones <ajones@...tanamicro.com>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Marc Zyngier <maz@...nel.org>,
	Atish Kumar Patra <atishp@...osinc.com>,
	Andrei Warkentin <andrei.warkentin@...el.com>,
	Haibo1 Xu <haibo1.xu@...el.com>,
	Björn Töpel <bjorn@...nel.org>,
	Sunil V L <sunilvl@...tanamicro.com>
Subject: [PATCH v5 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list

RISC-V PLIC and APLIC will have dependency from devices using GSI. So, add
these devices to the honor list.

Signed-off-by: Sunil V L <sunilvl@...tanamicro.com>
---
 drivers/acpi/scan.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
index 3e3320ddb3da..beded069cb0a 100644
--- a/drivers/acpi/scan.c
+++ b/drivers/acpi/scan.c
@@ -832,6 +832,8 @@ static const char * const acpi_honor_dep_ids[] = {
 	"INTC1095", /* IVSC (ADL) driver must be loaded to allow i2c access to camera sensors */
 	"INTC100A", /* IVSC (RPL) driver must be loaded to allow i2c access to camera sensors */
 	"INTC10CF", /* IVSC (MTL) driver must be loaded to allow i2c access to camera sensors */
+	"RSCV0001", /* RISC-V PLIC */
+	"RSCV0002", /* RISC-V APLIC */
 	NULL
 };
 
-- 
2.40.1


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