linux-kernel - [PATCH v1 01/13] serial: 8250_exar: Don't return positive values as error codes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240502144626.2716994-2-andriy.shevchenko@linux.intel.com>
Date: Thu,  2 May 2024 17:43:55 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Parker Newman <pnewman@...necttech.com>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	linux-kernel@...r.kernel.org,
	linux-serial@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>
Subject: [PATCH v1 01/13] serial: 8250_exar: Don't return positive values as error codes

PCI core may return positive codes for the specific errors.
There is a special API to convert them to negative stanrard ones.
Use that API to avoid returning positive values as error codes.

Fixes: f7ce07062988 ("serial: exar: add CTI specific setup code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
 drivers/tty/serial/8250/8250_exar.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
index 5e42558cbb01..9930668610ca 100644
--- a/drivers/tty/serial/8250/8250_exar.c
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -1162,12 +1162,12 @@ static int cti_board_init_fpga(struct exar8250 *priv, struct pci_dev *pcidev)
 	// Enable external interrupts in special cfg space register
 	ret = pci_read_config_word(pcidev, CTI_FPGA_CFG_INT_EN_REG, &cfg_val);
 	if (ret)
-		return ret;
+		return pcibios_err_to_errno(ret);
 
 	cfg_val |= CTI_FPGA_CFG_INT_EN_EXT_BIT;
 	ret = pci_write_config_word(pcidev, CTI_FPGA_CFG_INT_EN_REG, cfg_val);
 	if (ret)
-		return ret;
+		return pcibios_err_to_errno(ret);
 
 	// RS485 gate needs to be enabled; otherwise RTS/CTS will not work
 	exar_write_reg(priv, CTI_FPGA_RS485_IO_REG, 0x01);
-- 
2.43.0.rc1.1336.g36b5255a03ac