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Date: Thu, 2 May 2024 16:53:40 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>,
 Mark Brown <broonie@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 linux-riscv@...ts.infradead.org, linux-spi@...r.kernel.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 Conor Dooley <conor.dooley@...rochip.com>,
 Daire McNamara <daire.mcnamara@...rochip.com>,
 valentina.fernandezalanis@...rochip.com
Subject: Re: [PATCH 2/3] spi: dt-bindings: Add num-cs property for mpfs-spi

On 02/05/2024 16:34, Prajna Rajendra Kumar wrote:
> The PolarFire SoC SPI controller supports multiple chip selects,but in
> the MSS, only one CS line is physically wired. To reflect this hardware
> limitation in the device tree, the binding enforces that the 'num-cs'
> property defaults to 1 and cannot exceed 1 unless additional
> chip select lines are explicitly defined using GPIO descriptors.
> 

You marked it as Fix for bug, but I don't understand where the bug is.
Do you describe above the issue or the solution?

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: microchip,mpfs-spi
> +      not:
> +        required:
> +          - cs-gpios

I don't understand what you are expressing here. Did you actually
validate it that it achieves exactly what you want?

> +    then:
> +      properties:
> +        num-cs:
> +          default: 1
> +          maximum: 1
> +
>  unevaluatedProperties: false
>  
>  examples:

Best regards,
Krzysztof


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