linux-kernel - Re: [PATCH v7 09/18] drm/mediatek: Support constant blending in OVL

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Message-ID: <d96ba0780c8b42257b0a60b4878e4cf229536de8.camel@mediatek.com>
Date: Fri, 3 May 2024 05:29:25 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>,
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
	"angelogioacchino.delregno@...labora.com"
	<angelogioacchino.delregno@...labora.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	Bibby Hsieh (謝濟遠) <Bibby.Hsieh@...iatek.com>,
	"jason-ch.chen@...iatek.corp-partner.google.com"
	<jason-ch.chen@...iatek.corp-partner.google.com>,
	Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
	"daniel@...ll.ch" <daniel@...ll.ch>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>, "dri-devel@...ts.freedesktop.org"
	<dri-devel@...ts.freedesktop.org>, "airlied@...il.com" <airlied@...il.com>,
	"sean@...rly.run" <sean@...rly.run>, "matthias.bgg@...il.com"
	<matthias.bgg@...il.com>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v7 09/18] drm/mediatek: Support constant blending in OVL

Hi, Shawn:

On Thu, 2024-05-02 at 18:38 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@...iatek.com>
> 
> Support constant alpha blending in OVL.

What is constant alpha? I search in wikipedia but find nothing about
constant alpha. This is not a common term, so explain it.

Regards,
CK

> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 738244a6164e8..e41fd83e36e79 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -38,6 +38,7 @@
>  #define DISP_REG_OVL_PITCH_MSB(n)		(0x0040 + 0x20 * (n))
>  #define OVL_PITCH_MSB_2ND_SUBBUF			BIT(16)
>  #define DISP_REG_OVL_PITCH(n)			(0x0044 + 0x20
> * (n))
> +#define OVL_CONST_BLEND					BIT(28)
>  #define DISP_REG_OVL_RDMA_CTRL(n)		(0x00c0 + 0x20 * (n))
>  #define DISP_REG_OVL_RDMA_GMC(n)		(0x00c8 + 0x20 * (n))
>  #define DISP_REG_OVL_ADDR_MT2701		0x0040
> @@ -428,6 +429,7 @@ void mtk_ovl_layer_config(struct device *dev,
> unsigned int idx,
>  	unsigned int fmt = pending->format;
>  	unsigned int offset = (pending->y << 16) | pending->x;
>  	unsigned int src_size = (pending->height << 16) | pending-
> >width;
> +	unsigned int ignore_pixel_alpha = 0;
>  	unsigned int con;
>  	bool is_afbc = pending->modifier != DRM_FORMAT_MOD_LINEAR;
>  	union overlay_pitch {
> @@ -449,6 +451,9 @@ void mtk_ovl_layer_config(struct device *dev,
> unsigned int idx,
>  	if (state->base.fb && state->base.fb->format->has_alpha)
>  		con |= OVL_CON_AEN | OVL_CON_ALPHA;
>  
> +	if (state->base.fb && !state->base.fb->format->has_alpha)
> +		ignore_pixel_alpha = OVL_CONST_BLEND;
> +
>  	if (pending->rotation & DRM_MODE_REFLECT_Y) {
>  		con |= OVL_CON_VIRT_FLIP;
>  		addr += (pending->height - 1) * pending->pitch;
> @@ -464,8 +469,8 @@ void mtk_ovl_layer_config(struct device *dev,
> unsigned int idx,
>  
>  	mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs,
>  			      DISP_REG_OVL_CON(idx));
> -	mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb,
> &ovl->cmdq_reg, ovl->regs,
> -			      DISP_REG_OVL_PITCH(idx));
> +	mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb |
> ignore_pixel_alpha,
> +			      &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_PITCH(idx));
>  	mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl-
> >regs,
>  			      DISP_REG_OVL_SRC_SIZE(idx));
>  	mtk_ddp_write_relaxed(cmdq_pkt, offset, &ovl->cmdq_reg, ovl-
> >regs,