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Message-ID: <20240503-oncoming-taste-bab71375b67c@spud>
Date: Fri, 3 May 2024 17:21:41 +0100
From: Conor Dooley <conor@...nel.org>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Hauke Mehrtens <hauke@...ke-m.de>,
Rafał Miłecki <zajec5@...il.com>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Álvaro Fernández Rojas <noltari@...il.com>,
linux-mips@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Daniel González Cabanelas <dgcbueu@...il.com>
Subject: Re: [PATCH 3/6] dt-bindings: mips: brcm: Document mips-cbr-reg
property
On Fri, May 03, 2024 at 03:54:03PM +0200, Christian Marangi wrote:
> Document mips-cbr-reg and mips-broken-cbr-reg property.
>
> Some SoC suffer from a BUG where read_c0_brcm_cbr() might return 0
> if called from TP1. The CBR address is always the same on the SoC
> hence it can be provided in DT to handle broken case where bootloader
> doesn't init it or SMP where read_c0_brcm_cbr() returns 0 from TP1.
>
> Usage of this property is to give an address also in these broken
> configuration/bootloader.
>
> If the SoC/Bootloader ALWAYS provide a broken CBR address the property
> "mips-broken-cbr-reg" can be used to ignore any value already set in the
> registers for CBR address.
>
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> ---
> .../devicetree/bindings/mips/brcm/soc.yaml | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> index 975945ca2888..12d394b7e011 100644
> --- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml
> @@ -55,6 +55,21 @@ properties:
> under the "cpus" node.
> $ref: /schemas/types.yaml#/definitions/uint32
>
> + mips-broken-cbr-reg:
> + description: Declare that the Bootloader init a broken
> + CBR address in the registers and the one provided from
> + DT should always be used.
Why is this property even needed, is it not sufficient to just add the
mips-cbr-reg property to the DT for SoCs that need it and use the
property when present?
> + type: boolean
> +
> + mips-cbr-reg:
Missing a vendor prefix.
> + description: Reference address of the CBR.
> + Some SoC suffer from a BUG where read_c0_brcm_cbr() might
> + return 0 if called from TP1. The CBR address is always the
> + same on the SoC hence it can be provided in DT to handle
> + broken case where bootloader doesn't init it or SMP where
s/init/initialise/ please :)
Thanks,
Conor.
> + read_c0_brcm_cbr() returns 0 from TP1.
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> patternProperties:
> "^cpu@[0-9]$":
> type: object
> @@ -64,6 +79,23 @@ properties:
> required:
> - mips-hpt-frequency
>
> +dependencies:
> + mips-broken-cbr-reg: [ mips-cbr-reg ]
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + anyOf:
> + - const: brcm,bcm6358
> + - const: brcm,bcm6368
> +
> +then:
> + properties:
> + cpus:
> + required:
> + - mips-cbr-reg
> +
> additionalProperties: true
>
> examples:
> --
> 2.43.0
>
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