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Date: Sat, 4 May 2024 16:41:36 +0200
From: Borislav Petkov <bp@...en8.de>
To: Yazen Ghannam <yazen.ghannam@....com>
Cc: linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
	tony.luck@...el.com, x86@...nel.org, Avadhut.Naik@....com,
	John.Allen@....com
Subject: Re: [PATCH v2 08/16] x86/mce/amd: Clean up
 enable_deferred_error_interrupt()

On Mon, Apr 29, 2024 at 10:18:59AM -0400, Yazen Ghannam wrote:
> Good idea. In fact, we can treat this register as read-only, since we will
> only handle (SUCCOR && SMCA) systems. The only need to write this register
> would be on !SMCA systems.
> 
> We need to assume that the register value will be identical for all CPUs. This
> is the expectation, but I'll add a comment to highlight this.
> 
> Also, we don't need the entire register. We just need the LVT offset fields
> which are 4 bits each.

Yes, you could read out and sanity-check only the LVT offsets and make
they're the same across all cores to make sure BIOS hasn't dropped the
ball in programming them.

But see my previous mail too: I think we should leave pre-Zen as it is
and do cleanups and simplifications only for Zen and newer.

Thx.

-- 
Regards/Gruss,
    Boris.

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