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Date: Sun, 05 May 2024 18:39:00 +0200
From: Gregory CLEMENT <gregory.clement@...tlin.com>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo
Pieralisi <lorenzo.pieralisi@....com>, Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>, Andrew Lunn
<andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>, Russell King
<linux@...linux.org.uk>, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Subject: Re: [PATCH 04/10] ARM: orion5x: Use generic PCI Conf Type 1 helper
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com> writes:
> Convert orion5x PCI code to use pci_conf1_ext_addr() from PCI core to
> calculate PCI Configuration Type 1 address.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Acked-by: Gregory CLEMENT <gregory.clement@...tlin.com>
As some other patches of the series depend on patches in the PCIe
subsystem, the best approach would be to let you apply the series
through the PCIe subsystem.
Thanks,
Gregory
> ---
> arch/arm/mach-orion5x/pci.c | 17 ++---------------
> 1 file changed, 2 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
> index 6376e1db6386..8b7d67549adf 100644
> --- a/arch/arm/mach-orion5x/pci.c
> +++ b/arch/arm/mach-orion5x/pci.c
> @@ -216,15 +216,6 @@ static int __init pcie_setup(struct pci_sys_data *sys)
> #define PCI_P2P_DEV_OFFS 24
> #define PCI_P2P_DEV_MASK (0x1f << PCI_P2P_DEV_OFFS)
>
> -/*
> - * PCI_CONF_ADDR bits
> - */
> -#define ORION5X_PCI_CONF_REG(reg) ((reg) & 0xfc)
> -#define ORION5X_PCI_CONF_FUNC(func) (((func) & 0x3) << 8)
> -#define PCI_CONF_DEV(dev) (((dev) & 0x1f) << 11)
> -#define PCI_CONF_BUS(bus) (((bus) & 0xff) << 16)
> -#define PCI_CONF_ADDR_EN (1 << 31)
> -
> /*
> * Internal configuration space
> */
> @@ -276,9 +267,7 @@ static int orion5x_pci_hw_rd_conf(int bus, u8 devfn, u32 where,
> unsigned long flags;
> spin_lock_irqsave(&orion5x_pci_lock, flags);
>
> - writel(PCI_CONF_BUS(bus) |
> - PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
> - ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> + writel(pci_conf1_addr(bus, devfn, where, true), PCI_CONF_ADDR);
>
> *val = readl(PCI_CONF_DATA);
>
> @@ -300,9 +289,7 @@ static int orion5x_pci_hw_wr_conf(int bus, u8 devfn, u32 where,
>
> spin_lock_irqsave(&orion5x_pci_lock, flags);
>
> - writel(PCI_CONF_BUS(bus) |
> - PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
> - ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> + writel(pci_conf1_addr(bus, devfn, where, true), PCI_CONF_ADDR);
>
> if (size == 4) {
> __raw_writel(val, PCI_CONF_DATA);
> --
> 2.39.2
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