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Date: Mon, 6 May 2024 12:20:29 +0200
From: Borislav Petkov <bp@...en8.de>
To: Serge Semin <fancer.lancer@...il.com>
Cc: Michal Simek <michal.simek@....com>,
	Alexander Stein <alexander.stein@...tq-group.com>,
	Tony Luck <tony.luck@...el.com>, James Morse <james.morse@....com>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Robert Richter <rric@...nel.org>, Dinh Nguyen <dinguyen@...nel.org>,
	Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@...inx.com>,
	Arnd Bergmann <arnd@...db.de>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	linux-arm-kernel@...ts.infradead.org, linux-edac@...r.kernel.org,
	linux-kernel@...r.kernel.org, Sherry Sun <sherry.sun@....com>,
	Borislav Petkov <bp@...e.de>
Subject: Re: [PATCH v5 01/20] EDAC/synopsys: Fix ECC status data and IRQ
 disable race condition

On Thu, Apr 25, 2024 at 03:52:38PM +0300, Serge Semin wrote:
> Even if we get to add the spin-lock serializing the ECCCLR writes it
> won't solve the problem since the IRQ-disabler critical section could
> be executed a bit before the IRQ-handler critical section so the later
> one will just re-enable the IRQs disabled by the former one.
> 
> Here is what is suggested in my patch to fix the problem:
> 
>      IRQ-handler                        |    IRQ-disabler
>                                         |
> zynqmp_get_error_info:                  |
>                                         | lock_irqsave
>                                         | ECCCLR = 0; // disable IRQs
>                                         | unlock_irqrestore
>  lock_irqsave;                          |
>  tmp = ECCCLR | clear_sts_bits;         |
>  ECCCLR = tmp;                          |
>  unlock_irqrestore;                     |

<--- I'm presuming here the IRQ-disabler will reenable interrupts at
some point?

Otherwise we have the same problem as before when interrupts remain off
after the IRQ handler has run.

Other than that, yes, I see it, we will need the locking.

Thanks for elaborating.

-- 
Regards/Gruss,
    Boris.

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