linux-kernel - Re: [PATCH v7 5/6] dt-bindings: iio: adc: ad7192: Add AD7194 support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Mon, 6 May 2024 16:54:17 +0100
From: Conor Dooley <conor@...nel.org>
To: Jonathan Cameron <jic23@...nel.org>
Cc: Alisa-Dariana Roman <alisadariana@...il.com>,
	michael.hennerich@...log.com, linux-iio@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	alexandru.tachici@...log.com, lars@...afoo.de, robh@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	lgirdwood@...il.com, broonie@...nel.org, andy@...nel.org,
	nuno.sa@...log.com, marcelo.schmitt@...log.com,
	bigunclemax@...il.com, dlechner@...libre.com, okan.sahin@...log.com,
	fr0st61te@...il.com, alisa.roman@...log.com,
	marcus.folkesson@...il.com, schnelle@...ux.ibm.com,
	liambeguin@...il.com
Subject: Re: [PATCH v7 5/6] dt-bindings: iio: adc: ad7192: Add AD7194 support

On Sun, May 05, 2024 at 08:46:02PM +0100, Jonathan Cameron wrote:
> On Tue, 30 Apr 2024 18:21:01 +0100
> Conor Dooley <conor@...nel.org> wrote:
> 
> > On Tue, Apr 30, 2024 at 07:29:45PM +0300, Alisa-Dariana Roman wrote:
> > > +      diff-channels:
> > > +        description:
> > > +          Both inputs can be connected to pins AIN1 to AIN16 by choosing the
> > > +          appropriate value from 1 to 16.
> > > +        items:
> > > +          minimum: 1
> > > +          maximum: 16
> > > +
> > > +      single-channel:
> > > +        description:
> > > +          Positive input can be connected to pins AIN1 to AIN16 by choosing the
> > > +          appropriate value from 1 to 16. Negative input is connected to AINCOM.
> > > +        items:
> > > +          minimum: 1
> > > +          maximum: 16  
> > 
> > Up to 16 differential channels and 16 single-ended channels, but only 16
> > pins? Would the number of differential channels not max out at 8?
> 
> May not really be limited to 16 differential. Many chips use general purpose
> muxes on both sides so you can do all combinations. In practice that's normally
> pointless.
> 
> A more useful case is to do all but one channel as positive inputs and the remaining
> channel as the negative for those 15 differential channels.

Yah, 15 is what I had in my head as the highest reasonable number given
the information given about the AIN# pins.

> This is effectively the same as doing pseudo differential channels, but
> on more flexible hardware.  This is in contrast to a device that only supports
> pseudo differential where there is a special pin for the negative
> (this device has that as well as full muxes on the other 16 lines).
> 
> Having said all that.  The ad7194 datasheet says 8 differential channels..
> I have no idea why though... Maybe something to do with the mux switching?
> Or maybe assumption is that if you want to do pseudo differential you'll use
> the pseudo differential mode rather than wasting hardware?

I didn't look at the datasheet tbf, I was just asking given the
description didn't make sense to me and looking for an explanation from
the author.

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)