linux-kernel - Re: [PATCH v3 10/11] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date: Tue, 7 May 2024 09:55:57 -0500
From: Rob Herring <robh@...nel.org>
To: Frank Li <Frank.li@....com>
Cc: Richard Zhu <hongxing.zhu@....com>,
	Lucas Stach <l.stach@...gutronix.de>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	NXP Linux Team <linux-imx@....com>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-pci@...r.kernel.org,
	imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, bpf@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH v3 10/11] dt-bindings: imx6q-pcie: Add i.MX8Q pcie
 compatible string

On Mon, Apr 29, 2024 at 05:23:23PM -0400, Frank Li wrote:
> On Mon, Apr 29, 2024 at 10:48:23AM -0500, Rob Herring wrote:
> > On Tue, Apr 02, 2024 at 10:33:46AM -0400, Frank Li wrote:
> > > From: Richard Zhu <hongxing.zhu@....com>
> > > 
> > > Add i.MX8Q PCIe "fsl,imx8q-pcie" compatible strings.
> > > 
> > > Add "fsl,local-address" property for i.MX8Q platforms. fsl,local-address
> > > is address of PCIe module in high speed io (HSIO)subsystem bus fabric. HSIO
> > > bus fabric convert the incoming address base to this local-address. Two
> > > instances of PCI have difference local address.
> > 
> > This is just some intermediate bus address? We really should be able to 
> > describe this with standard ranges properties.
> 
> Yes, Maybe dwc's implement have some problem. After read below doc again
> https://elinux.org/Device_Tree_Usage#PCI_Address_Translation
> 
>                   ┌──────┐  ┌──────────┐                                 
> ┌────┐0x18001000  │      │  │          │                                 
> │CPU ├───────────►│      ├──┤  Others  │                                 
> └────┘            │      │  │          │                                 
>                   │      │  └──────────┘                                 
>                   │      │                                               
>                   │      │   ┌─────────┐                                 
>                   │      │   │         │            ┌───────────┐        
>                   │      ├──►│ HSIO    │ 0xB8001000 ├───────────┤        
>                   │      │   │ Fabric  ├───────────►│Bar0       │ TLP mem 0xB8001000   
>                   │      │   │         │            │0xB8000000 ├───────►
>                   └──────┘   └─────────┘            │           │        

Note the 0xB8xxxxxxx address on the right is a PCI address which could 
be anything though folks often make it 1:1.

>                   Main Fabric                       ├───────────┤        
>                                                     │           │        
>                                                     │           │        
>                                                     │           │        
>                                                     │           │        
>                                                     │           │        
>                                                     │           │        
>                                                     │ DWC       │        
>                                                     │ PCIe      │        
>                                                     │ Controller│        
>                                                     │           │        
>                                                     │           │        
>                                                     └───────────┘        
> 
> 
> dts should be
> 
> ranges = <0x82000000 0 0xB8000000 0x18000000 0 0x07f00000>
> 		       ^^^^

And HSIO needs a node with 

ranges = <0xb8000000 0x18000000 size>;

Rob