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Message-ID: <20240507155413.266057-11-panikiel@google.com>
Date: Tue, 7 May 2024 15:54:13 +0000
From: "Paweł Anikiel" <panikiel@...gle.com>
To: airlied@...il.com, akpm@...ux-foundation.org, conor+dt@...nel.org,
daniel@...ll.ch, dinguyen@...nel.org, hverkuil-cisco@...all.nl,
krzysztof.kozlowski+dt@...aro.org, maarten.lankhorst@...ux.intel.com,
mchehab@...nel.org, mripard@...nel.org, robh+dt@...nel.org,
tzimmermann@...e.de
Cc: devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
chromeos-krk-upstreaming@...gle.com,
"Paweł Anikiel" <panikiel@...gle.com>
Subject: [PATCH v3 10/10] ARM: dts: chameleonv3: Add video device nodes
Add device nodes for the video system present on the Chameleon v3.
It consists of six video interfaces and two Intel DisplayPort receivers.
Signed-off-by: Paweł Anikiel <panikiel@...gle.com>
---
.../socfpga/socfpga_arria10_chameleonv3.dts | 194 ++++++++++++++++++
1 file changed, 194 insertions(+)
diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts
index 422d00cd4c74..daafcc14e8cc 100644
--- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts
+++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_chameleonv3.dts
@@ -10,6 +10,200 @@ / {
compatible = "google,chameleon-v3", "enclustra,mercury-aa1",
"altr,socfpga-arria10", "altr,socfpga";
+ soc {
+ video0: video@...60500 {
+ compatible = "google,chv3-video-it-1.0";
+ reg = <0xc0060500 0x100>,
+ <0xc0060f20 0x10>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ video_mst0: video@...60600 {
+ compatible = "google,chv3-video-dp-1.0";
+ reg = <0xc0060600 0x100>,
+ <0xc0060f30 0x10>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+
+ port {
+ video_mst0_0: endpoint {
+ remote-endpoint = <&dprx_mst_0>;
+ };
+ };
+ };
+
+ video_mst1: video@...60700 {
+ compatible = "google,chv3-video-dp-1.0";
+ reg = <0xc0060700 0x100>,
+ <0xc0060f40 0x10>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+
+ port {
+ video_mst1_0: endpoint {
+ remote-endpoint = <&dprx_mst_1>;
+ };
+ };
+ };
+
+ video_mst2: video@...60800 {
+ compatible = "google,chv3-video-dp-1.0";
+ reg = <0xc0060800 0x100>,
+ <0xc0060f50 0x10>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+
+ port {
+ video_mst2_0: endpoint {
+ remote-endpoint = <&dprx_mst_2>;
+ };
+ };
+ };
+
+ video_mst3: video@...60900 {
+ compatible = "google,chv3-video-dp-1.0";
+ reg = <0xc0060900 0x100>,
+ <0xc0060f60 0x10>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+
+ port {
+ video_mst3_0: endpoint {
+ remote-endpoint = <&dprx_mst_3>;
+ };
+ };
+ };
+
+ video_sst: video@...60a00 {
+ compatible = "google,chv3-video-dp-1.0";
+ reg = <0xc0060a00 0x100>,
+ <0xc0060f70 0x10>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+
+ port {
+ video_sst_0: endpoint {
+ remote-endpoint = <&dprx_sst_0>;
+ };
+ };
+ };
+
+ dprx_mst_irq: intc@...60f80 {
+ compatible = "altr,pio-1.0";
+ reg = <0xc0060f80 0x10>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ dprx_sst_irq: intc@...60fe0 {
+ compatible = "altr,pio-1.0";
+ reg = <0xc0060fe0 0x10>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ dprx_mst: dp-receiver@...62000 {
+ compatible = "intel,dprx-20.0.1";
+ reg = <0xc0062000 0x800>;
+ interrupt-parent = <&dprx_mst_irq>;
+ interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dprx_mst_in: endpoint {
+ remote-endpoint = <&dp_input_mst_0>;
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000
+ 5400000000 8100000000>;
+ multi-stream-support;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dprx_mst_0: endpoint {
+ remote-endpoint = <&video_mst0_0>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ dprx_mst_1: endpoint {
+ remote-endpoint = <&video_mst1_0>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ dprx_mst_2: endpoint {
+ remote-endpoint = <&video_mst2_0>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ dprx_mst_3: endpoint {
+ remote-endpoint = <&video_mst3_0>;
+ };
+ };
+ };
+ };
+
+ dprx_sst: dp-receiver@...64000 {
+ compatible = "intel,dprx-20.0.1";
+ reg = <0xc0064000 0x800>;
+ interrupt-parent = <&dprx_sst_irq>;
+ interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dprx_sst_in: endpoint {
+ remote-endpoint = <&dp_input_sst_0>;
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000
+ 5400000000 8100000000>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dprx_sst_0: endpoint {
+ remote-endpoint = <&video_sst_0>;
+ };
+ };
+ };
+ };
+ };
+
+ dp-input-mst {
+ compatible = "dp-connector";
+ type = "full-size";
+
+ port {
+ dp_input_mst_0: endpoint {
+ remote-endpoint = <&dprx_mst_in>;
+ };
+ };
+ };
+
+ dp-input-sst {
+ compatible = "dp-connector";
+ type = "full-size";
+
+ port {
+ dp_input_sst_0: endpoint {
+ remote-endpoint = <&dprx_sst_in>;
+ };
+ };
+ };
+
aliases {
serial0 = &uart0;
i2c0 = &i2c0;
--
2.45.0.rc1.225.g2a3ae87e7f-goog
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