[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <4b63f70c-8a48-4290-90c7-25627de0d52d@arm.com>
Date: Tue, 7 May 2024 13:34:36 +0100
From: Ryan Roberts <ryan.roberts@....com>
To: David Hildenbrand <david@...hat.com>,
Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
Joey Gouly <joey.gouly@....com>, Ard Biesheuvel <ardb@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Anshuman Khandual <anshuman.khandual@....com>, Peter Xu <peterx@...hat.com>,
Mike Rapoport <rppt@...ux.ibm.com>, Shivansh Vij <shivanshvij@...look.com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/4] arm64/mm: generalize PMD_PRESENT_INVALID for all
levels
On 07/05/2024 12:38, David Hildenbrand wrote:
> On 03.05.24 16:45, Ryan Roberts wrote:
>> As preparation for the next patch, which frees up the PTE_PROT_NONE
>> present pte and swap pte bit, generalize PMD_PRESENT_INVALID to
>> PTE_PRESENT_INVALID. This will then be used to mark PROT_NONE ptes (and
>> entries at any other level) in the next patch.
>>
>> While we're at it, fix up the swap pte format comment to include
>> PTE_PRESENT_INVALID. This is not new, it just wasn't previously
>> documented.
>>
>> Reviewed-by: Catalin Marinas <catalin.marinas@....com>
>> Signed-off-by: Ryan Roberts <ryan.roberts@....com>
>> ---
>> arch/arm64/include/asm/pgtable-prot.h | 8 ++++----
>> arch/arm64/include/asm/pgtable.h | 21 ++++++++++++---------
>> 2 files changed, 16 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/pgtable-prot.h
>> b/arch/arm64/include/asm/pgtable-prot.h
>> index dd9ee67d1d87..cdbf51eef7a6 100644
>> --- a/arch/arm64/include/asm/pgtable-prot.h
>> +++ b/arch/arm64/include/asm/pgtable-prot.h
>> @@ -21,11 +21,11 @@
>> #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when
>> !PTE_VALID */
>> /*
>> - * This bit indicates that the entry is present i.e. pmd_page()
>> - * still points to a valid huge page in memory even if the pmd
>> - * has been invalidated.
>> + * PTE_PRESENT_INVALID=1 & PTE_VALID=0 indicates that the pte's fields should be
>> + * interpreted according to the HW layout by SW but any attempted HW access to
>> + * the address will result in a fault. pte_present() returns true.
>> */
>> -#define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when
>> !PMD_SECT_VALID */
>> +#define PTE_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when
>> !PTE_VALID */
>
> Ah, so PTE_VALID == PMD_SECT_VALID. Would that also be a reasonable
> generalization independent of this? (or do we keep it as is because it's a HW def?)
To be honest, I'm not sure of the history, but some things are implemented as
wrappers around pte functions and others are implemented specifically for
pmd/pud/etc.
On arm64, block mappings (all levels except last level) have the same HW format
as page mappings (last level) except that bit 1 must be 0 for block and 1 for
page. And with this series, SW/non-present bits are all matching too. So my vote
would be to harmonise toward a single implementation in future (modulus the bit
1 problem), which would include getting rid of things like PMD_SECT_VALID.
>
> Reviewed-by: David Hildenbrand <david@...hat.com>
Thanks for all the R-bs!
Powered by blists - more mailing lists