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Date: Wed, 8 May 2024 17:39:03 +0100
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: Conor Dooley <conor@...nel.org>, linux-spi@...r.kernel.org
Cc: Conor Dooley <conor.dooley@...rochip.com>, stable@...r.kernel.org,
 Daire McNamara <daire.mcnamara@...rochip.com>,
 Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>,
 Mark Brown <broonie@...nel.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] spi: microchip-core-qspi: fix setting spi bus clock
 rate



On 5/8/24 16:46, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> Before ORing the new clock rate with the control register value read
> from the hardware, the existing clock rate needs to be masked off as
> otherwise the existing value will interfere with the new one.
> 
> CC: stable@...r.kernel.org
> Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers")
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@...aro.org>

> ---
> CC: Conor Dooley <conor.dooley@...rochip.com>
> CC: Daire McNamara <daire.mcnamara@...rochip.com>
> CC: Naga Sureshkumar Relli <nagasuresh.relli@...rochip.com>
> CC: Mark Brown <broonie@...nel.org>
> CC: linux-spi@...r.kernel.org
> CC: linux-kernel@...r.kernel.org
> ---
>  drivers/spi/spi-microchip-core-qspi.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
> index 03d125a71fd9..09f16471c537 100644
> --- a/drivers/spi/spi-microchip-core-qspi.c
> +++ b/drivers/spi/spi-microchip-core-qspi.c
> @@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
>  	}
>  
>  	control = readl_relaxed(qspi->regs + REG_CONTROL);
> +	control &= ~CONTROL_CLKRATE_MASK;
>  	control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
>  	writel_relaxed(control, qspi->regs + REG_CONTROL);
>  	control = readl_relaxed(qspi->regs + REG_CONTROL);

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