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Message-Id: <20240508065141.565848-1-ychuang570808@gmail.com>
Date: Wed, 8 May 2024 06:51:38 +0000
From: Jacky Huang <ychuang570808@...il.com>
To: linus.walleij@...aro.org,
robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org,
p.zabel@...gutronix.de,
j.neuschaefer@....net
Cc: linux-arm-kernel@...ts.infradead.org,
linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
ychuang3@...oton.com,
schung@...oton.com
Subject: [PATCH v8 0/3] Add support for nuvoton ma35d1 pin control
From: Jacky Huang <ychuang3@...oton.com>
This patch series adds the pin control and GPIO driver for the nuvoton ma35d1
ARMv8 SoC. It includes DT binding documentation and the ma35d1 pin control driver.
This pin control driver has been tested on the ma35d1 som board with Linux 6.9.0-rc7.
v8:
- Update pinctrl driver:
- Utilize macros wherever possible for managing register bit fields.
- Revise the usage of 'hwirq'.
- Transition to fwnode-based operations instead of device_node as possible.
- Refactor function ma35_pinctrl_parse_groups().
- Adopt new PM macros.
- Implement other minor fixes.
- Update dt-binding docuemnt:
- Add property 'reg' to this pinctrl node.
- Correct the patternProperties name from "pins-" to "-pins" and relocate
it under "-grp".
v7:
- Replace the magic numbers appearing in the driver with defined constants, or
provide comments to explain them.
- Update the ma35_irq_irqtype()
- irq_set_handler_locked(d, handle_edge_irq) and
irq_set_handler_locked(d, handle_level_irq)
- add case IRQ_TYPE_EDGE_BOTH
- Use handle_bad_irq for girq->handler, instead of handle_level_irq
v6:
- Remove DTS from this patchset. The DTS will be submitted in another patchset.
v5:
- Update the pinctrl driver header file pinctrl-ma35.h
- Include platform_device.h to fix compile issues.
v4:
- Update the pinctrl driver Kconfig
- Add depends to CONFIG_PINCTRL_MA35D1 to prevent compilation errors.
- Update the pinctrl driver
- Utilize devm_kcalloc() instead of devm_kzalloc().
- Employ ARRAY_SIZE() instead of sizeof()/sizeof().
v3:
- Update DTS and YAML files
- Corrected the unit address of nodes gpioa ~ gpion.
- Removed the invalid "pin-default" node.
- Removed the phandle entry from "nuvoton,pins".
- Update pinctrl driver
- Fixed the Kconfig by using "depend on" instead of "if".
- Removed unused #include of header files.
- Utilized immutable irq_chip instead of dynamic irq_chip.
- Replaced ma35_dt_free_map() with pinconf_generic_dt_free_map().
- Implemented other minor fixes as suggested by the reviewer.
v2:
- Update nuvoton,ma35d1-pinctrl.yaml
- Update the 'nuvoton,pins' to follow the style of rockchip pinctrl approch.
- Use power-source to indicate the pin voltage selection which follow the
realtek pinctrl approch.
- Instead of integer, use drive-strength-microamp to specify the real driving
strength capability of IO pins.
- Update ma35d1 pinctrl driver
- Add I/O drive strength lookup table for translating device tree setting
into control register.
- Remove ma35d1-pinfunc.h which is unused after update definition of 'nuvoton,pins'.
Jacky Huang (3):
dt-bindings: reset: Add syscon to nuvoton ma35d1 system-management
node
dt-bindings: pinctrl: Document nuvoton ma35d1 pin control
pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver
.../pinctrl/nuvoton,ma35d1-pinctrl.yaml | 178 ++
.../bindings/reset/nuvoton,ma35d1-reset.yaml | 3 +-
drivers/pinctrl/nuvoton/Kconfig | 19 +
drivers/pinctrl/nuvoton/Makefile | 2 +
drivers/pinctrl/nuvoton/pinctrl-ma35.c | 1197 +++++++++++
drivers/pinctrl/nuvoton/pinctrl-ma35.h | 52 +
drivers/pinctrl/nuvoton/pinctrl-ma35d1.c | 1799 +++++++++++++++++
7 files changed, 3249 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,ma35d1-pinctrl.yaml
create mode 100644 drivers/pinctrl/nuvoton/pinctrl-ma35.c
create mode 100644 drivers/pinctrl/nuvoton/pinctrl-ma35.h
create mode 100644 drivers/pinctrl/nuvoton/pinctrl-ma35d1.c
--
2.34.1
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