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Message-Id: <20240510-imx-clk-v2-6-c998f315d29c@nxp.com>
Date: Fri, 10 May 2024 17:19:01 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: Abel Vesa <abelvesa@...nel.org>, 
 Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, Shawn Guo <shawnguo@...nel.org>, 
 Sascha Hauer <s.hauer@...gutronix.de>, 
 Pengutronix Kernel Team <kernel@...gutronix.de>, 
 Fabio Estevam <festevam@...il.com>, Jacky Bai <ping.bai@....com>, 
 Ye Li <ye.li@....com>, Dong Aisheng <aisheng.dong@....com>
Cc: linux-clk@...r.kernel.org, imx@...ts.linux.dev, 
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 Abel Vesa <abel.vesa@...aro.org>, Peng Fan <peng.fan@....com>, 
 Shengjiu Wang <shengjiu.wang@....com>
Subject: [PATCH v2 06/17] clk: imx: pll14xx: use rate_table for audio plls

From: Shengjiu Wang <shengjiu.wang@....com>

The generated clock frequency may not accurate, for example
the expected rate is 361267200U, but result is 361267199U.
Add rate_table for audio clocks to avoid such issue.

Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
Reviewed-by: Jacky Bai <ping.bai@....com>
Signed-off-by: Peng Fan <peng.fan@....com>
---
 drivers/clk/imx/clk-pll14xx.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 55812bfb9ec2..6b2c849f8b71 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -64,6 +64,17 @@ static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = {
 	PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
 	PLL_1443X_RATE(594000000U, 198, 2, 2, 0),
 	PLL_1443X_RATE(519750000U, 173, 2, 2, 16384),
+	PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
+	PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
+	PLL_1443X_RATE(245760000U, 328, 4, 3, 0xae15),
+	PLL_1443X_RATE(225792000U, 226, 3, 3, 0xcac1),
+	PLL_1443X_RATE(122880000U, 328, 4, 4, 0xae15),
+	PLL_1443X_RATE(112896000U, 226, 3, 4, 0xcac1),
+	PLL_1443X_RATE(61440000U, 328, 4, 5, 0xae15),
+	PLL_1443X_RATE(56448000U, 226, 3, 5, 0xcac1),
+	PLL_1443X_RATE(49152000U, 393, 3, 6, 0x374c),
+	PLL_1443X_RATE(45158400U, 241, 2, 6, 0xd845),
+	PLL_1443X_RATE(40960000U, 109, 1, 6, 0x3a07),
 };
 
 struct imx_pll14xx_clk imx_1443x_pll = {

-- 
2.37.1


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