lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20240511122955.2372f56e@jic23-huawei>
Date: Sat, 11 May 2024 12:29:55 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: David Lechner <dlechner@...libre.com>, Alisa-Dariana Roman
 <alisadariana@...il.com>, michael.hennerich@...log.com,
 linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, alexandru.tachici@...log.com,
 lars@...afoo.de, robh@...nel.org, krzysztof.kozlowski+dt@...aro.org,
 conor+dt@...nel.org, lgirdwood@...il.com, broonie@...nel.org,
 andy@...nel.org, nuno.sa@...log.com, marcelo.schmitt@...log.com,
 bigunclemax@...il.com, okan.sahin@...log.com, fr0st61te@...il.com,
 alisa.roman@...log.com, marcus.folkesson@...il.com, schnelle@...ux.ibm.com,
 liambeguin@...il.com
Subject: Re: [PATCH v7 5/6] dt-bindings: iio: adc: ad7192: Add AD7194
 support

On Fri, 10 May 2024 22:26:22 +0100
Conor Dooley <conor@...nel.org> wrote:

> On Fri, May 10, 2024 at 09:21:37AM -0500, David Lechner wrote:
> > On 5/10/24 5:05 AM, Alisa-Dariana Roman wrote:  
> > > On 30.04.2024 20:21, Conor Dooley wrote:  
> > >> On Tue, Apr 30, 2024 at 07:29:45PM +0300, Alisa-Dariana Roman wrote:  
> > >>> +      diff-channels:
> > >>> +        description:
> > >>> +          Both inputs can be connected to pins AIN1 to AIN16 by choosing the
> > >>> +          appropriate value from 1 to 16.
> > >>> +        items:
> > >>> +          minimum: 1
> > >>> +          maximum: 16
> > >>> +
> > >>> +      single-channel:
> > >>> +        description:
> > >>> +          Positive input can be connected to pins AIN1 to AIN16 by choosing the
> > >>> +          appropriate value from 1 to 16. Negative input is connected to AINCOM.
> > >>> +        items:
> > >>> +          minimum: 1
> > >>> +          maximum: 16  
> > >>
> > >> Up to 16 differential channels and 16 single-ended channels, but only 16
> > >> pins? Would the number of differential channels not max out at 8?  
> > > 
> > > Hello, Conor! I really appreciate the feedback!
> > > 
> > > The way I thought about it, the only thing constraining the number of channels is the reg number (minimum: 0, maximum: 271). 272 channels cover all possible combinations (16*16 differential and 16 single ended) and I thought there is no need for anything stricter. I added items: minimum:1 maximum:16 to make sure the numbers are from 1 to 16, corresponding to AIN1-AIN16.
> > > 
> > > Please let me know what should be improved!
> > > 
> > > Kind regards,
> > > Alisa-Dariana Roman.
> > >   
> > 
> > Having looked at the datasheet for this and other similar chips, I agree
> > that this reasoning makes sense. Some of the similar chips that have fixed
> > channel assignments still have, e.g. a channel where + and - are both
> > AIN2 (I assume for diagnostics). So I think it makes sense to allow for
> > doing something similar here even if the most common use cases will
> > probably have at most 16 channels defined in the .dts.  
> 
> Actually, I think there were a bunch of whiffs on this one by either
> misreading the property in question (me) or not realising that I had done
> that and trying to explain what the possible combinations are.
> Looking at it now, I dunno wtf I was smoking because there's no way that
> this would be a functional binding if the min/max in the quote above
> constraining the number of channels. I can hardly blame y'all for that
> though, I am supposed to know how bindings work after all...

Me too :(  I also failed to register this doesn't constrain
channel counts at all.

Anyhow, all's well that ends well!

J

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ