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Message-ID: <20240511153051.1355825-5-a-bhatia1@ti.com>
Date: Sat, 11 May 2024 21:00:48 +0530
From: Aradhya Bhatia <a-bhatia1@...com>
To: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Andrzej Hajda
<andrzej.hajda@...el.com>,
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CC: DRI Development List <dri-devel@...ts.freedesktop.org>,
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Aradhya Bhatia
<a-bhatia1@...com>
Subject: [PATCH 4/7] drm/bridge: cdns-dsi: Reset the DCS write FIFO
Allow the DCS Write FIFO in the cdns-dsi controller to reset before any
DCS packet is transmitted to the DSI sink device.
Signed-off-by: Aradhya Bhatia <a-bhatia1@...com>
---
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
index 05d2f4cc50da..87fdd07ca0bc 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
@@ -1037,6 +1037,9 @@ static ssize_t cdns_dsi_transfer(struct mipi_dsi_host *host,
cdns_dsi_init_link(dsi);
+ /* Reset the DCS Write FIFO */
+ writel(0x00, dsi->regs + DIRECT_CMD_FIFO_RST);
+
ret = mipi_dsi_create_packet(&packet, msg);
if (ret)
goto out;
--
2.34.1
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