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Message-ID: <Zj-WE1aG7ihtevG3@x1>
Date: Sat, 11 May 2024 13:00:19 -0300
From: Arnaldo Carvalho de Melo <acme@...nel.org>
To: Breno Leitao <leitao@...ian.org>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>, leit@...a.com,
"open list:PERFORMANCE EVENTS SUBSYSTEM" <linux-perf-users@...r.kernel.org>,
"open list:PERFORMANCE EVENTS SUBSYSTEM" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] perf list: Fix the --no-desc option
On Wed, May 08, 2024 at 06:35:17AM -0700, Breno Leitao wrote:
> Currently, the --no-desc option in perf list isn't functioning as
> intended.
>
> This issue arises from the overwriting of struct option->desc with the
> opposite value of struct option->long_desc. Consequently, whatever
> parse_options() returns at struct option->desc gets overridden later,
> rendering the --desc or --no-desc arguments ineffective.
>
> To resolve this, set ->desc as true by default and allow parse_options()
> to adjust it accordingly. This adjustment will fix the --no-desc
> option while preserving the functionality of the other parameters.
Thanks, applied to perf-tools-next, and added this:
Committer testing:
Before:
$ perf list --no-desc
<SNIP>
cache:
longest_lat_cache.miss
[Counts the number of cacheable memory requests that miss in the LLC. Counts on a per core basis. Unit: cpu_atom]
longest_lat_cache.reference
[Counts the number of cacheable memory requests that access the LLC. Counts on a per core basis. Unit: cpu_atom]
mem_bound_stalls.ifetch
[Counts the number of cycles the core is stalled due to an instruction cache or TLB miss which hit in the L2,LLC,DRAM or MMIO (Non-DRAM). Unit: cpu_atom]
mem_bound_stalls.ifetch_dram_hit
[Counts the number of cycles the core is stalled due to an instruction cache or TLB miss which hit in DRAM or MMIO (Non-DRAM). Unit: cpu_atom]
mem_bound_stalls.ifetch_l2_hit
[Counts the number of cycles the core is stalled due to an instruction cache or TLB miss which hit in the L2 cache. Unit: cpu_atom]
mem_bound_stalls.ifetch_llc_hit
[Counts the number of cycles the core is stalled due to an instruction cache or TLB miss which hit in the LLC or other core with HITE/F/M. Unit: cpu_atom]
<SNIP>
After:
$ perf list --no-desc
<SNIP>
cache:
longest_lat_cache.miss
longest_lat_cache.reference
mem_bound_stalls.ifetch
mem_bound_stalls.ifetch_dram_hit
mem_bound_stalls.ifetch_l2_hit
mem_bound_stalls.ifetch_llc_hit
<SNIP>
Signed-off-by: Breno Leitao <leitao@...ian.org>
Tested-by: Arnaldo Carvalho de Melo <acme@...hat.com>
- Arnaldo
> Signed-off-by: Breno Leitao <leitao@...ian.org>
> ---
> tools/perf/builtin-list.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/perf/builtin-list.c b/tools/perf/builtin-list.c
> index 02bf608d585e..58589f67e800 100644
> --- a/tools/perf/builtin-list.c
> +++ b/tools/perf/builtin-list.c
> @@ -491,6 +491,7 @@ int cmd_list(int argc, const char **argv)
> int i, ret = 0;
> struct print_state default_ps = {
> .fp = stdout,
> + .desc = true,
> };
> struct print_state json_ps = {
> .fp = stdout,
> @@ -563,7 +564,6 @@ int cmd_list(int argc, const char **argv)
> };
> ps = &json_ps;
> } else {
> - default_ps.desc = !default_ps.long_desc;
> default_ps.last_topic = strdup("");
> assert(default_ps.last_topic);
> default_ps.visited_metrics = strlist__new(NULL, NULL);
> --
> 2.43.0
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