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Message-ID: <202405130618.N7QKeg94-lkp@intel.com>
Date: Mon, 13 May 2024 06:24:00 +0800
From: kernel test robot <lkp@...el.com>
To: Kiarash Hajian <kiarash8112hajian@...il.com>,
Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>
Cc: llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Kiarash Hajian <kiarash8112hajian@...il.com>
Subject: Re: [PATCH v3 2/2] drm/msm/a6xx: request memory region
Hi Kiarash,
kernel test robot noticed the following build errors:
[auto build test ERROR on cf87f46fd34d6c19283d9625a7822f20d90b64a4]
url: https://github.com/intel-lab-lkp/linux/commits/Kiarash-Hajian/drm-msm-a6xx-request-memory-region/20240512-135215
base: cf87f46fd34d6c19283d9625a7822f20d90b64a4
patch link: https://lore.kernel.org/r/20240512-msm-adreno-memory-region-v3-2-0a728ad45010%40gmail.com
patch subject: [PATCH v3 2/2] drm/msm/a6xx: request memory region
config: i386-buildonly-randconfig-001-20240513 (https://download.01.org/0day-ci/archive/20240513/202405130618.N7QKeg94-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240513/202405130618.N7QKeg94-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202405130618.N7QKeg94-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/msm/adreno/a6xx_gmu.c:1605:8: error: use of undeclared label 'err_mmio'
1605 | goto err_mmio;
| ^
1 error generated.
vim +/err_mmio +1605 drivers/gpu/drm/msm/adreno/a6xx_gmu.c
c11fa1204fe940 Akhil P Oommen 2023-01-02 1582
5a903a44a98471 Konrad Dybcio 2023-06-16 1583 int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
5a903a44a98471 Konrad Dybcio 2023-06-16 1584 {
5a903a44a98471 Konrad Dybcio 2023-06-16 1585 struct platform_device *pdev = of_find_device_by_node(node);
5a903a44a98471 Konrad Dybcio 2023-06-16 1586 struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
5a903a44a98471 Konrad Dybcio 2023-06-16 1587 int ret;
5a903a44a98471 Konrad Dybcio 2023-06-16 1588
5a903a44a98471 Konrad Dybcio 2023-06-16 1589 if (!pdev)
5a903a44a98471 Konrad Dybcio 2023-06-16 1590 return -ENODEV;
5a903a44a98471 Konrad Dybcio 2023-06-16 1591
5a903a44a98471 Konrad Dybcio 2023-06-16 1592 gmu->dev = &pdev->dev;
5a903a44a98471 Konrad Dybcio 2023-06-16 1593
5a903a44a98471 Konrad Dybcio 2023-06-16 1594 of_dma_configure(gmu->dev, node, true);
5a903a44a98471 Konrad Dybcio 2023-06-16 1595
5a903a44a98471 Konrad Dybcio 2023-06-16 1596 pm_runtime_enable(gmu->dev);
5a903a44a98471 Konrad Dybcio 2023-06-16 1597
5a903a44a98471 Konrad Dybcio 2023-06-16 1598 /* Mark legacy for manual SPTPRAC control */
5a903a44a98471 Konrad Dybcio 2023-06-16 1599 gmu->legacy = true;
5a903a44a98471 Konrad Dybcio 2023-06-16 1600
5a903a44a98471 Konrad Dybcio 2023-06-16 1601 /* Map the GMU registers */
5a903a44a98471 Konrad Dybcio 2023-06-16 1602 gmu->mmio = a6xx_gmu_get_mmio(pdev, "gmu");
5a903a44a98471 Konrad Dybcio 2023-06-16 1603 if (IS_ERR(gmu->mmio)) {
5a903a44a98471 Konrad Dybcio 2023-06-16 1604 ret = PTR_ERR(gmu->mmio);
5a903a44a98471 Konrad Dybcio 2023-06-16 @1605 goto err_mmio;
5a903a44a98471 Konrad Dybcio 2023-06-16 1606 }
5a903a44a98471 Konrad Dybcio 2023-06-16 1607
5a903a44a98471 Konrad Dybcio 2023-06-16 1608 gmu->cxpd = dev_pm_domain_attach_by_name(gmu->dev, "cx");
5a903a44a98471 Konrad Dybcio 2023-06-16 1609 if (IS_ERR(gmu->cxpd)) {
5a903a44a98471 Konrad Dybcio 2023-06-16 1610 ret = PTR_ERR(gmu->cxpd);
5a903a44a98471 Konrad Dybcio 2023-06-16 1611 goto err_mmio;
5a903a44a98471 Konrad Dybcio 2023-06-16 1612 }
5a903a44a98471 Konrad Dybcio 2023-06-16 1613
5a903a44a98471 Konrad Dybcio 2023-06-16 1614 if (!device_link_add(gmu->dev, gmu->cxpd, DL_FLAG_PM_RUNTIME)) {
5a903a44a98471 Konrad Dybcio 2023-06-16 1615 ret = -ENODEV;
5a903a44a98471 Konrad Dybcio 2023-06-16 1616 goto detach_cxpd;
5a903a44a98471 Konrad Dybcio 2023-06-16 1617 }
5a903a44a98471 Konrad Dybcio 2023-06-16 1618
5a903a44a98471 Konrad Dybcio 2023-06-16 1619 init_completion(&gmu->pd_gate);
5a903a44a98471 Konrad Dybcio 2023-06-16 1620 complete_all(&gmu->pd_gate);
5a903a44a98471 Konrad Dybcio 2023-06-16 1621 gmu->pd_nb.notifier_call = cxpd_notifier_cb;
5a903a44a98471 Konrad Dybcio 2023-06-16 1622
5a903a44a98471 Konrad Dybcio 2023-06-16 1623 /* Get a link to the GX power domain to reset the GPU */
5a903a44a98471 Konrad Dybcio 2023-06-16 1624 gmu->gxpd = dev_pm_domain_attach_by_name(gmu->dev, "gx");
5a903a44a98471 Konrad Dybcio 2023-06-16 1625 if (IS_ERR(gmu->gxpd)) {
5a903a44a98471 Konrad Dybcio 2023-06-16 1626 ret = PTR_ERR(gmu->gxpd);
5a903a44a98471 Konrad Dybcio 2023-06-16 1627 }
5a903a44a98471 Konrad Dybcio 2023-06-16 1628
5a903a44a98471 Konrad Dybcio 2023-06-16 1629 gmu->initialized = true;
5a903a44a98471 Konrad Dybcio 2023-06-16 1630
5a903a44a98471 Konrad Dybcio 2023-06-16 1631 return 0;
5a903a44a98471 Konrad Dybcio 2023-06-16 1632
5a903a44a98471 Konrad Dybcio 2023-06-16 1633 detach_cxpd:
5a903a44a98471 Konrad Dybcio 2023-06-16 1634 dev_pm_domain_detach(gmu->cxpd, false);
5a903a44a98471 Konrad Dybcio 2023-06-16 1635
5a903a44a98471 Konrad Dybcio 2023-06-16 1636 /* Drop reference taken in of_find_device_by_node */
5a903a44a98471 Konrad Dybcio 2023-06-16 1637 put_device(gmu->dev);
5a903a44a98471 Konrad Dybcio 2023-06-16 1638
5a903a44a98471 Konrad Dybcio 2023-06-16 1639 return ret;
5a903a44a98471 Konrad Dybcio 2023-06-16 1640 }
5a903a44a98471 Konrad Dybcio 2023-06-16 1641
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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