| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Mon, 13 May 2024 09:30:20 +0200
From: Ingo Molnar <mingo@...nel.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: linux-kernel@...r.kernel.org, the arch/x86 maintainers <x86@...nel.org>
Subject: [GIT PULL] x86/cpu changes for v6.10
Linus,
Please pull the latest x86/cpu Git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-cpu-2024-05-13
# HEAD: 2eda374e883ad297bd9fe575a16c1dc850346075 x86/mm: Switch to new Intel CPU model defines
x86/cpu changes for v6.10:
- Rework the x86 CPU vendor/family/model code: introduce the 'VFM'
value that is an 8+8+8 bit concatenation of the vendor/family/model
value, and add macros that work on VFM values. This simplifies the
addition of new Intel models & families, and simplifies existing
enumeration & quirk code.
- Add support for the AMD 0x80000026 leaf, to better parse topology
information.
- Optimize the NUMA allocation layout of more per-CPU data structures
- Improve the workaround for AMD erratum 1386
- Clear TME from /proc/cpuinfo as well, when disabled by the firmware
- Improve x86 self-tests
- Extend the mce_record tracepoint with the ::ppin and ::microcode fields
- Implement recovery for MCE errors in TDX/SEAM non-root mode
- Misc cleanups and fixes
Thanks,
Ingo
------------------>
Avadhut Naik (2):
tracing: Add the ::ppin field to the mce_record tracepoint
tracing: Add the ::microcode field to the mce_record tracepoint
Bingsong Si (1):
x86/cpu: Clear TME feature flag if TME is not enabled by BIOS
Borislav Petkov (AMD) (2):
x86/cpu: Get rid of an unnecessary local variable in get_cpu_address_sizes()
x86/CPU/AMD: Improve the erratum 1386 workaround
Ingo Molnar (2):
x86/mce: Clean up TP_printk() output line of the 'mce_record' tracepoint
x86/cpu: Improve readability of per-CPU cpumask initialization code
Li RongQing (2):
x86/cpu: Take NUMA node into account when allocating per-CPU cpumasks
x86/sev: Take NUMA node into account when allocating memory for per-CPU SEV data
Muhammad Usama Anjum (1):
x86/selftests: Skip the tests if prerequisites aren't fulfilled
Rafael J. Wysocki (1):
x86/cpu: Move leftover contents of topology.c to setup.c
Thomas Gleixner (1):
x86/cpu/topology: Add support for the AMD 0x80000026 leaf
Tony Luck (22):
x86/mce: Implement recovery for errors in TDX/SEAM non-root mode
x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86
x86/cpu/vfm: Add new macros to work with (vendor/family/model) values
x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h
x86/bugs: Switch to new Intel CPU model defines
x86/bugs: Switch to new Intel CPU model defines
perf/x86/intel/cstate: Switch to new Intel CPU model defines
perf/x86/lbr: Switch to new Intel CPU model defines
perf/x86/intel/pt: Switch to new Intel CPU model defines
perf/x86/intel/uncore: Switch to new Intel CPU model defines
perf/x86/msr: Switch to new Intel CPU model defines
x86/apic: Switch to new Intel CPU model defines
x86/aperfmperf: Switch to new Intel CPU model defines
x86/cpu/intel_epb: Switch to new Intel CPU model defines
x86/cpu: Switch to new Intel CPU model defines
x86/mce: Switch to new Intel CPU model defines
x86/microcode/intel: Switch to new Intel CPU model defines
x86/resctrl: Switch to new Intel CPU model defines
x86/cpu: Switch to new Intel CPU model defines
x86/tsc: Switch to new Intel CPU model defines
x86/tsc_msr: Switch to new Intel CPU model defines
x86/mm: Switch to new Intel CPU model defines
arch/x86/events/intel/cstate.c | 116 ++++++++++----------
arch/x86/events/intel/lbr.c | 3 +-
arch/x86/events/intel/pt.c | 12 +--
arch/x86/events/intel/uncore.c | 100 ++++++++---------
arch/x86/events/intel/uncore_nhmex.c | 3 +-
arch/x86/events/intel/uncore_snbep.c | 5 +-
arch/x86/events/msr.c | 116 ++++++++++----------
arch/x86/include/asm/cpu_device_id.h | 101 ++++++++++++++++++
arch/x86/include/asm/intel-family.h | 84 +++++++++++++++
arch/x86/include/asm/mce.h | 2 +
arch/x86/include/asm/processor.h | 20 +++-
arch/x86/kernel/Makefile | 2 +-
arch/x86/kernel/apic/apic.c | 38 +++----
arch/x86/kernel/apic/x2apic_cluster.c | 7 +-
arch/x86/kernel/cpu/amd.c | 12 +++
arch/x86/kernel/cpu/aperfmperf.c | 17 ++-
arch/x86/kernel/cpu/bugs.c | 30 +++---
arch/x86/kernel/cpu/common.c | 171 +++++++++++++++---------------
arch/x86/kernel/cpu/intel.c | 1 +
arch/x86/kernel/cpu/intel_epb.c | 12 +--
arch/x86/kernel/cpu/match.c | 5 +-
arch/x86/kernel/cpu/mce/core.c | 24 ++++-
arch/x86/kernel/cpu/mce/intel.c | 21 ++--
arch/x86/kernel/cpu/mce/severity.c | 26 +++--
arch/x86/kernel/cpu/microcode/intel.c | 5 +-
arch/x86/kernel/cpu/resctrl/core.c | 10 +-
arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 22 ++--
arch/x86/kernel/cpu/topology_amd.c | 19 ++--
arch/x86/kernel/cpu/topology_ext.c | 15 +++
arch/x86/kernel/setup.c | 8 ++
arch/x86/kernel/sev.c | 8 +-
arch/x86/kernel/smpboot.c | 28 ++---
arch/x86/kernel/topology.c | 43 --------
arch/x86/kernel/tsc.c | 6 +-
arch/x86/kernel/tsc_msr.c | 14 +--
arch/x86/mm/init.c | 16 ++-
include/trace/events/mce.h | 25 ++++-
tools/testing/selftests/x86/amx.c | 27 ++---
tools/testing/selftests/x86/lam.c | 2 +-
39 files changed, 704 insertions(+), 472 deletions(-)
delete mode 100644 arch/x86/kernel/topology.c
Powered by blists - more mailing lists