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Message-ID: <1484c1b7-90aa-4495-a417-a400add8602a@lunn.ch>
Date: Mon, 13 May 2024 20:07:19 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Jitendra Vegiraju <jitendra.vegiraju@...adcom.com>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>, netdev@...r.kernel.org,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, bcm-kernel-feedback-list@...adcom.com,
alexandre.torgue@...s.st.com, joabreu@...opsys.com,
mcoquelin.stm32@...il.com, richardcochran@...il.com,
linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2, net-next, 2/2] net: stmmac: PCI driver for BCM8958X
SoC
> Yes, the MAC directly connects to switch within the SoC with no external MII.
> The SoC is BCM89586M/BCM89587 automotive ethernet switch.
> The SOC presents PCIE interfaces on BCM89586M/BCM89587 automotive
> ethernet switch.
> The switch supports many ethernet interfaces out of which one or two
> interfaces are presented as PCIE endpoints to the host connected on
> the PCIE bus.
> The MAC connects to switch using XGMII interface internal to the SOC.
> The high level diagram is shown below:
>
> +==================================================+
> +--------+ | BCM8958X
> switch SoC +----------------+ |
> | Host | | +----------------+
> +-------+ | | | ===
> more ethernet IFs
> | CPU | ===PCIE===| PCIE endpoint |==DMA==| MAC |==XGMII==|
> switch fabric | | === more ethernet IFs
> |Linux | | +----------------+
> +-------+ | | |
> +-------+ |
> +-----------------+ |
>
> +==================================================+
> Since the legacy fixed link cannot support 10G, we are initializing to
> fixed speed 1G.
You ASCII art is broken, probably because you are not using a fixed
width font.
So the interface between the MAC and the switch is fixed at XGMII. Is
the MAC actually capable of anything other than XGMII? If XGMII is all
it can do, then there is no need for a fixed link. You use a
fixed-link when you have a conventional off the shelf MAC which can do
10BaseT_Half through to 10GBaseT. Normally there would be a PHY
connected to the MAC and phylib/phylink will determine the line rate
and tell the MAC what speed to operate at. However, if this device
only supports XGMII, it is impossible to connect to a PHY because
there is no external MII interface, then skip all the phylib/phylink
support and hard code it. Look at the patches on the netdev list for
the RealTek automotive driver which seems to be pretty similar.
Andrew
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