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Message-ID: <32d2be34-07e5-4f99-bd31-12aeb9bdce09@sirena.org.uk>
Date: Tue, 14 May 2024 09:51:14 +0100
From: Mark Brown <broonie@...nel.org>
To: Ben Wolsieffer <ben.wolsieffer@...ring.com>
Cc: Leonard Göhrs <l.goehrs@...gutronix.de>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com, linux-spi@...r.kernel.org,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alain Volmat <alain.volmat@...s.st.com>
Subject: Re: [PATCH v2] spi: stm32: enable controller before asserting CS
On Mon, May 13, 2024 at 12:36:57PM -0400, Ben Wolsieffer wrote:
> On Mon, May 13, 2024 at 10:29:49AM +0200, Leonard Göhrs wrote:
> > Reverting this commit fixes the issue for me. It may be some time before
> > I get around to investigating the issue in detail, so I thought I should
> > ask if anyone else has already noticed this as well.
> Sorry about that; it looks like the STM32H7/MP platforms require the
> controller to be enabled later. I agree that it should be reverted and
> I'll try to think of another approach.
Can one of you please send a patch with the revert and a changelog
explaining the issue?
> The STM32H7/MP devices are significantly different from the F4/7
> devices, which makes it difficult to change shared code without causing
> problems like this. I wonder if it might be better to split the F4/7
> support into a separate driver. This would duplicate a bit of code,
> namely the initialization in probe, the baud rate divider calculation
> and the SPI mode config, but would make testing easier and get rid of
> the indirection that handles the different register offsets and field
> masks on each platform. The code for actually transcieving data and
> handling IRQs is already platform specific.
That might make sense.
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