linux-kernel - [PATCH v2 0/3] Add support for GPIO based CS

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Date: Tue, 14 May 2024 11:45:05 +0100
From: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
To: Mark Brown <broonie@...nel.org>
CC: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	<linux-riscv@...ts.infradead.org>, <linux-spi@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>, Conor Dooley
	<conor.dooley@...rochip.com>, Daire McNamara <daire.mcnamara@...rochip.com>,
	<valentina.fernandezalanis@...rochip.com>,
	<prajna.rajendrakumar@...rochip.com>
Subject: [PATCH v2 0/3] Add support for GPIO based CS

The Microchip PolarFire SoC SPI "hard" controller supports eight 
chip selects. However, only one chip select is physically wired. 
Therefore, use GPIO descriptors to configure additional chip select 
lines.

v1-> v2: 
 - Modified all commit messages for better understanding
 - driver - added spi_is_csgpiod() API to address review comment
 - bindings - fixed bindings to set the default value of num-cs

Prajna Rajendra Kumar (3):
  spi: dt-bindings: Add num-cs property for mpfs-spi
  spi: spi-microchip-core: Fix the number of chip selects supported
  spi: spi-microchip-core: Add support for GPIO based CS

 .../bindings/spi/microchip,mpfs-spi.yaml      | 29 +++++++++++++++++--
 drivers/spi/spi-microchip-core.c              |  6 +++-
 2 files changed, 31 insertions(+), 4 deletions(-)

-- 
2.25.1