lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <afab9026-e843-4cc4-8733-f45e9ab34276@kaechele.ca>
Date: Tue, 14 May 2024 10:01:19 -0400
From: Felix Kaechele <felix@...chele.ca>
To: Mark Brown <broonie@...nel.org>,
 Dmitry Torokhov <dmitry.torokhov@...il.com>
Cc: Job Noorman <job@...rman.info>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, linux-input@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/5] input: himax_hx83112b: implement MCU register
 reading

On 2024-05-14 05:46, Mark Brown wrote:
> On Mon, May 13, 2024 at 04:01:59PM -0700, Dmitry Torokhov wrote:
>> On Sat, May 11, 2024 at 08:12:24AM -0400, Felix Kaechele wrote:
>>> Implement reading from the MCU in a more universal fashion. This allows
>>> properly handling reads of more than 4 bytes using the AHB FIFO
>>> implemented in the chip.
> 
>> Mark, do we have anything in regmap to support this better or having a
>> wrapper is the best solution here?
> 
> No, I've not seen something that explicitly requires toggling a burst
> mode on and off to do a bulk operation.  Off the top of my head I'd
> suggest just always leaving the burst mode enabled but I assume there's
> some downside to doing that.  We could add something but I'm not sure if
> it's worth it without having seen any other devices with the same need.

I can experiment some more with just leaving burst mode enabled.

Since the vendor driver invariably enables burst mode before any 
transaction of more than 4 bytes I'll have to see if burst mode does 
remain enabled under all circumstances of normal operation.
Since I don't have access to the datasheet I cannot know what the 
intended behaviour and/or downsides are. Due to that I played it safe 
and mimicked the behaviour of the vendor driver.

I'm guessing not having to enable burst mode on every touch event 
interrupt could also mean an improvement in latency, since we save two 
write cycles on the bus for each fetching of the event data.
Not sure how measurable that would be though.
I'm thinking to myself Himax at some point recognized this and that is 
why we see a dedicated touch event read register on later models in this 
chip family.

Regards,
Felix

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ