linux-kernel - [PATCH 0/2] riscv: Allow vlenb to be probed from DT

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20240515-add_vlenb_to_dt-v1-0-4ebd7cba0aa1@rivosinc.com>
Date: Wed, 15 May 2024 14:50:13 -0700
From: Charlie Jenkins <charlie@...osinc.com>
To: Conor Dooley <conor@...nel.org>, 
 Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>
Cc: Palmer Dabbelt <palmer@...ive.com>, linux-riscv@...ts.infradead.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 Charlie Jenkins <charlie@...osinc.com>, 
 Conor Dooley <conor.dooley@...rochip.com>
Subject: [PATCH 0/2] riscv: Allow vlenb to be probed from DT

The kernel currently requires all harts to have the same value in the
vlenb csr that is present when a hart supports vector. In order to read
this csr, the kernel needs to boot the hart. Adding vlenb to the DT will
allow the kernel to detect the inconsistency early and not waste time
trying to boot harts that it doesn't support.

Signed-off-by: Charlie Jenkins <charlie@...osinc.com>

---
The two patches in this series were previously part of a series "riscv:
Support vendor extensions and xtheadvector" but has been factored out
due to a lack of reviews on the thead specific parts so that series will
be updated separately.

---
Charlie Jenkins (1):
      riscv: vector: Use vlenb from DT

Conor Dooley (1):
      dt-bindings: riscv: cpus: add a vlen register length property

 Documentation/devicetree/bindings/riscv/cpus.yaml |  6 +++
 arch/riscv/include/asm/cpufeature.h               |  2 +
 arch/riscv/kernel/cpufeature.c                    | 47 +++++++++++++++++++++++
 arch/riscv/kernel/vector.c                        | 12 +++++-
 4 files changed, 66 insertions(+), 1 deletion(-)
---
base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6
change-id: 20240515-add_vlenb_to_dt-307bb406ecc5
-- 
- Charlie