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Date: Wed, 15 May 2024 09:29:20 +0800 (CST)
From: "Slark Xiao" <slark_xiao@....com>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@...aro.org>
Cc: loic.poulain@...aro.org, mhi@...ts.linux.dev, linux-arm-msm@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re:Re: [PATCH] bus: mhi: host: Add Foxconn SDX72 related support

At 2024-05-14 22:37:41, "Manivannan Sadhasivam" <manivannan.sadhasivam@...aro.org> wrote:
>On Fri, May 10, 2024 at 11:26:57AM +0800, Slark Xiao wrote:
>> Align with Qcom SDX72, add ready timeout item for Foxconn SDX72.
>> And also, add firehose support since SDX72.
>> 
>> Signed-off-by: Slark Xiao <slark_xiao@....com>
>> ---
>>  drivers/bus/mhi/host/pci_generic.c | 31 ++++++++++++++++++++++++++++++
>>  1 file changed, 31 insertions(+)
>> 
>> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
>> index 08844ee79654..0fd94c193fc6 100644
>> --- a/drivers/bus/mhi/host/pci_generic.c
>> +++ b/drivers/bus/mhi/host/pci_generic.c
>> @@ -399,6 +399,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
>>  	MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
>>  	MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
>>  	MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
>> +	MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0),
>> +	MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0),
>
>This means SDX55 is also supporting FIREHOSE channels, which is not true I
>believe.
Actually, I just verified it with my sdx55 and the answer is Yes. These channels
are common settings for Qcom device which support PCIe mode. BTW, the
default settings of Qcom and Quectel support firehose for their sdx55 products.
>
>>  	MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2),
>>  	MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3),
>>  };
>> @@ -419,6 +421,16 @@ static const struct mhi_controller_config modem_foxconn_sdx55_config = {
>>  	.event_cfg = mhi_foxconn_sdx55_events,
>>  };
>>  
>> +static const struct mhi_controller_config modem_foxconn_sdx72_config = {
>> +	.max_channels = 128,
>> +	.timeout_ms = 20000,
>> +	.ready_timeout_ms = 50000,
>> +	.num_channels = ARRAY_SIZE(mhi_foxconn_sdx55_channels),
>> +	.ch_cfg = mhi_foxconn_sdx55_channels,
>> +	.num_events = ARRAY_SIZE(mhi_foxconn_sdx55_events),
>> +	.event_cfg = mhi_foxconn_sdx55_events,
>> +};
>> +
>>  static const struct mhi_pci_dev_info mhi_foxconn_sdx24_info = {
>>  	.name = "foxconn-sdx24",
>>  	.config = &modem_foxconn_sdx55_config,
>> @@ -448,6 +460,16 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx65_info = {
>>  	.sideband_wake = false,
>>  };
>>  
>> +static const struct mhi_pci_dev_info mhi_foxconn_sdx72_info = {
>> +	.name = "foxconn-sdx72",
>> +	.edl = "qcom/sdx72m/xbl_s_devprg_ns.melf",
>
>What is '.melf'? Is the firmware available somewhere? Did you plan to upstream
>it to linux-firmware?
>
This file similar with "edl.mbn". In SDX72 product, the default "edl" file name is
"xbl_s_devprg_ns.melf". Currently we don't plan to upstream it to linux-firmware
since 2 reasons: 1: we share the same fold name sdx72m with qcom or other vendors
2: this file may be changed since sdx72 product still under developing in our side. we
may change the base line according to QCOM release.
>- Mani
>
>-- 
>மணிவண்ணன் சதாசிவம்

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