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Date: Thu, 16 May 2024 09:59:44 +0100
From: Conor Dooley <conor.dooley@...rochip.com>
To: Andrew Jones <ajones@...tanamicro.com>
CC: Conor Dooley <conor@...nel.org>, <linux-riscv@...ts.infradead.org>,
	<xiao.w.wang@...el.com>, <pulehui@...wei.com>, Charlie Jenkins
	<charlie@...osinc.com>, Paul Walmsley <paul.walmsley@...ive.com>, Palmer
 Dabbelt <palmer@...belt.com>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1] RISC-V: separate Zbb optimisations requiring and not
 requiring toolchain support

On Thu, May 16, 2024 at 09:59:44AM +0200, Andrew Jones wrote:
> On Wed, May 15, 2024 at 04:27:40PM GMT, Conor Dooley wrote:
> 
> So the new hidden config is a shorthand for
> 
> #if defined(CONFIG_RISCV_ISA_ZBB) && \
>     defined(CONFIG_TOOLCHAIN_HAS_ZBB) && \
>     defined(CONFIG_RISCV_ALTERNATIVE)
> 
> which is reasonable to add, since that's a mouthful, but I'm not sure the
> name, RISCV_ISA_ZBB_ALT, does a good job conveying all that.
> 
> If we instead just dropped the 'depends on TOOLCHAIN_HAS_ZBB' from
> config RISCV_ISA_ZBB (keeping the 'depends on RISCV_ALTERNATIVE',
> since nobody is really complaining about that), then we could change
> this to
> 
> #if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)

Yeah, I think this is a cleaner solution.

> >  	asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
> >  				      RISCV_ISA_EXT_ZBB, 1)
> >  			  : : : : legacy);
> > diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
> > index 880606b0469a..3ed810a6123d 100644
> > --- a/arch/riscv/include/asm/bitops.h
> > +++ b/arch/riscv/include/asm/bitops.h
> > @@ -15,7 +15,7 @@
> >  #include <asm/barrier.h>
> >  #include <asm/bitsperlong.h>
> >  
> > -#if !defined(CONFIG_RISCV_ISA_ZBB) || defined(NO_ALTERNATIVE)
> > +#if !defined(CONFIG_RISCV_ISA_ZBB_ALT) || defined(NO_ALTERNATIVE)
> 
> nit: It's sufficient to check !defined(CONFIG_RISCV_ISA_ZBB), so no need
> for this change or its #endif comment change below.

Are you sure? I did test leaving this as-was and it broke the build for
llvm-14.

Cheers,
Conor.

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