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Message-ID: <d840e007-c819-42df-bc71-536328d4f5d7@lunn.ch>
Date: Fri, 17 May 2024 15:49:39 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Justin Lai <justinlai0215@...ltek.com>
Cc: kuba@...nel.org, davem@...emloft.net, edumazet@...gle.com,
pabeni@...hat.com, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, jiri@...nulli.us, horms@...nel.org,
rkannoth@...vell.com, pkshih@...ltek.com, larry.chiu@...ltek.com
Subject: Re: [PATCH net-next v19 01/13] rtase: Add pci table supported in
this module
> + * Below is a simplified block diagram of the chip and its relevant interfaces.
> + *
> + * *************************
> + * * *
> + * * CPU network device *
> + * * *
> + * * +-------------+ *
> + * * | PCIE Host | *
> + * ***********++************
> + * ||
> + * PCIE
> + * ||
> + * ********************++**********************
> + * * | PCIE Endpoint | *
> + * * +---------------+ *
> + * * | GMAC | *
> + * * +--++--+ Realtek *
> + * * || RTL90xx Series *
> + * * || *
> + * * +-------------++----------------+ *
> + * * | | MAC | | *
> + * * | +-----+ | *
> + * * | | *
> + * * | Ethernet Switch Core | *
> + * * | | *
> + * * | +-----+ +-----+ | *
> + * * | | MAC |...........| MAC | | *
> + * * +---+-----+-----------+-----+---+ *
> + * * | PHY |...........| PHY | *
> + * * +--++-+ +--++-+ *
> + * *************||****************||***********
> + *
> + * The block of the Realtek RTL90xx series is our entire chip architecture,
> + * the GMAC is connected to the switch core, and there is no PHY in between.
Given this architecture, this driver cannot be used unless there is a
switch driver as well. This driver is nearly ready to be merged. So
what are your plans for the switch driver? Do you have a first version
you can post? That will reassure us you do plan to release a switch
driver, and not use a SDK in userspace.
Andrew
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