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Message-ID: <20240517141938.4177174-15-kirill.shutemov@linux.intel.com>
Date: Fri, 17 May 2024 17:19:32 +0300
From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
"K. Y. Srinivasan" <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>,
Dexuan Cui <decui@...rosoft.com>,
Josh Poimboeuf <jpoimboe@...nel.org>,
Peter Zijlstra <peterz@...radead.org>
Cc: linux-coco@...ts.linux.dev,
linux-kernel@...r.kernel.org,
linux-hyperv@...r.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: [PATCH 14/20] x86/tdx: Add macros to generate TDCALL wrappers
Introduce a set of macros that allow to generate wrappers for TDCALL
leafs.
There are three macros differentiated by number of return parameters.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
---
arch/x86/include/asm/shared/tdx.h | 58 +++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/x86/include/asm/shared/tdx.h b/arch/x86/include/asm/shared/tdx.h
index 46c299dc9cf0..70190ebc63ca 100644
--- a/arch/x86/include/asm/shared/tdx.h
+++ b/arch/x86/include/asm/shared/tdx.h
@@ -80,6 +80,64 @@
#include <linux/compiler_attributes.h>
+#define TDCALL ".byte 0x66,0x0f,0x01,0xcc\n\t"
+
+#define TDCALL_0(reason, in_rcx, in_rdx, in_r8, in_r9) \
+({ \
+ long __ret; \
+ \
+ asm( \
+ "movq %[r8_in], %%r8\n\t" \
+ "movq %[r9_in], %%r9\n\t" \
+ TDCALL \
+ : "=a" (__ret), ASM_CALL_CONSTRAINT \
+ : "a" (reason), "c" (in_rcx), "d" (in_rdx), \
+ [r8_in] "rm" ((u64)in_r8), [r9_in] "rm" ((u64)in_r9) \
+ : "r8", "r9" \
+ ); \
+ __ret; \
+})
+
+#define TDCALL_1(reason, in_rcx, in_rdx, in_r8, in_r9, out_r8) \
+({ \
+ long __ret; \
+ \
+ asm( \
+ "movq %[r8_in], %%r8\n\t" \
+ "movq %[r9_in], %%r9\n\t" \
+ TDCALL \
+ "movq %%r8, %[r8_out]\n\t" \
+ : "=a" (__ret), ASM_CALL_CONSTRAINT, [r8_out] "=rm" (out_r8) \
+ : "a" (reason), "c" (in_rcx), "d" (in_rdx), \
+ [r8_in] "rm" ((u64)in_r8), [r9_in] "rm" ((u64)in_r9) \
+ : "r8", "r9" \
+ ); \
+ __ret; \
+})
+
+#define TDCALL_5(reason, in_rcx, in_rdx, in_r8, in_r9, \
+ out_rcx, out_rdx, out_r8, out_r9, out_r10) \
+({ \
+ long __ret; \
+ \
+ asm( \
+ "movq %[r8_in], %%r8\n\t" \
+ "movq %[r9_in], %%r9\n\t" \
+ TDCALL \
+ "movq %%r8, %[r8_out]\n\t" \
+ "movq %%r9, %[r9_out]\n\t" \
+ "movq %%r10, %[r10_out]\n\t" \
+ : "=a" (__ret), ASM_CALL_CONSTRAINT, \
+ "=c" (out_rcx), "=d" (out_rdx), \
+ [r8_out] "=rm" (out_r8), [r9_out] "=rm" (out_r9), \
+ [r10_out] "=rm" (out_r10) \
+ : "a" (reason), "c" (in_rcx), "d" (in_rdx), \
+ [r8_in] "rm" ((u64)in_r8), [r9_in] "rm" ((u64)in_r9) \
+ : "r8", "r9", "r10" \
+ ); \
+ __ret; \
+})
+
#define TDVMCALL_0(reason, in_r12, in_r13, in_r14, in_r15) \
({ \
long __ret; \
--
2.43.0
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