[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <tencent_9D721BDDF88C04DBB5151D57711D62524209@qq.com>
Date: Sat, 18 May 2024 23:57:45 +0800
From: Yangyu Chen <cyy@...self.name>
To: linux-riscv@...ts.infradead.org
Cc: Elliott Hughes <enh@...gle.com>,
Charlie Jenkins <charlie@...osinc.com>,
Jonathan Corbet <corbet@....net>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Evan Green <evan@...osinc.com>,
Clément Léger <cleger@...osinc.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Andrew Jones <ajones@...tanamicro.com>,
linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org,
Yangyu Chen <cyy@...self.name>
Subject: [PATCH 0/2] docs: riscv: Some clarifies on hwprobe misaligned performance
This patchset clarifies some unclear things about hwprobe's misaligned
performance. Including:
- hwprobe misaligned performance is only applied to scalar from patch [1]
- The defined keys of RISCV_HWPROBE_MISALIGNED_* are values not bitmasks
I cherry-picked [1] rather than write dependency because the original patch
was submitted with a line wrapped to 80 characters. We can't directly apply
that patch using `git am.`
[1] https://lore.kernel.org/linux-riscv/CAJgzZorn5anPH8dVPqvjVWmLKqTi5bkLDR=FH-ZAcdXFnNe8Eg@mail.gmail.com/
Yangyu Chen (1):
docs: riscv: hwprobe: Clarify misaligned keys are values not bitmasks
enh (1):
docs: riscv: Clarify risc-v hwprobe RISCV_HWPROBE_MISALIGNED_* docs.
Documentation/arch/riscv/hwprobe.rst | 31 ++++++++++++++++------------
1 file changed, 18 insertions(+), 13 deletions(-)
--
2.43.0
Powered by blists - more mailing lists