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Message-Id: <20240520145402.2526481-1-sean.anderson@linux.dev>
Date: Mon, 20 May 2024 10:53:55 -0400
From: Sean Anderson <sean.anderson@...ux.dev>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
linux-pci@...r.kernel.org
Cc: Michal Simek <michal.simek@....com>,
Thippeswamy Havalige <thippeswamy.havalige@....com>,
linux-arm-kernel@...ts.infradead.org,
Bjorn Helgaas <bhelgaas@...gle.com>,
linux-kernel@...r.kernel.org,
Sean Anderson <sean.anderson@...ux.dev>,
Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>,
Bharat Kumar Gogada <bharatku@...inx.com>,
Bjorn Helgaas <helgaas@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Michal Simek <michal.simek@...inx.com>,
devicetree@...r.kernel.org
Subject: [PATCH v3 0/7] PCI: xilinx-nwl: Add phy support
Add phy subsystem support for the xilinx-nwl PCIe controller. This
series also includes several small fixes and improvements.
Changes in v3:
- Document phys property
- Expand off-by-one commit message
Changes in v2:
- Remove phy-names
- Add an example
- Get phys by index and not by name
Sean Anderson (7):
dt-bindings: pci: xilinx-nwl: Add phys
PCI: xilinx-nwl: Fix off-by-one in IRQ handler
PCI: xilinx-nwl: Fix register misspelling
PCI: xilinx-nwl: Rate-limit misc interrupt messages
PCI: xilinx-nwl: Clean up clock on probe failure/removal
PCI: xilinx-nwl: Add phy support
arm64: zynqmp: Add PCIe phys
.../bindings/pci/xlnx,nwl-pcie.yaml | 7 +
.../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 +
drivers/pci/controller/pcie-xilinx-nwl.c | 122 ++++++++++++++----
3 files changed, 107 insertions(+), 23 deletions(-)
--
2.35.1.1320.gc452695387.dirty
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