[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <171622065959.617153.198991768265226176.robh@kernel.org>
Date: Mon, 20 May 2024 10:57:45 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Noralf Trønnes <noralf@...nnes.org>
Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Daniel Vetter <daniel@...ll.ch>, Maxime Ripard <mripard@...nel.org>,
David Airlie <airlied@...il.com>,
Jessica Zhang <quic_jesszhan@...cinc.com>,
Sam Ravnborg <sam@...nborg.org>, linux-kernel@...r.kernel.org,
Thomas Zimmermann <tzimmermann@...e.de>,
Neil Armstrong <neil.armstrong@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, dri-devel@...ts.freedesktop.org,
devicetree@...r.kernel.org,
Tommaso Merciai <tommaso.merciai@...rulasolutions.com>,
Kamlesh Gurudasani <kamlesh.gurudasani@...il.com>
Subject: Re: [PATCH v2 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a
pixel format property
On Sun, 12 May 2024 17:25:38 +0200, Noralf Trønnes wrote:
> The MIPI DBI 2.0 specification (2005) lists only two pixel formats for
> the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with
> 2 options for bit layout.
>
> For Type A and B (parallel) the following formats are listed: RGB332,
> RGB444, RGB565, RGB666 and RGB888 (some have 2 options for the bit layout).
>
> Many MIPI DBI compatible controllers support all interface types on the
> same chip and often the manufacturers have chosen to provide support for
> the Type A/B interface pixel formats also on the Type C interface.
>
> Some chips provide many pixel formats with optional bit layouts over SPI,
> but the most common by far are RGB565 and RGB666. So even if the
> specification doesn't list these formats for the Type C interface, the
> industry has chosen to include them.
>
> The MIPI DCS specification lists the standard commands that can be sent
> over the MIPI DBI interface. The set_address_mode (36h) command has one
> bit in the parameter that controls RGB/BGR order:
> This bit controls the RGB data latching order transferred from the
> peripheral’s frame memory to the display device.
> This means that each supported RGB format also has a BGR variant.
>
> Based on this rationale document the following pixel formats describing
> the bit layout going over the wire:
> - RGB111 (option 1): x2r1g1b1r1g1b1 (2 pixels per byte)
> - BGR111 (option 1): x2b1g1r1b1g1r1 (2 pixels per byte)
> - RGB111 (option 2): x1r1g1b1x1r1g1b1 (2 pixels per byte)
> - BGR111 (option 2): x1b1g1r1x1b1g1r1 (2 pixels per byte)
> - RGB565: r5g6b5 (2 bytes)
> - BGR565: b5g6r5 (2 bytes)
> - RGB666: r6x2g6x2b6x2 (3 bytes)
> - BGR666: b6x2g6x2r6x2 (3 bytes)
> (x: don't care)
>
> v2:
> - Use 'default: r5g6b5' (Rob)
>
> Signed-off-by: Noralf Trønnes <noralf@...nnes.org>
> ---
> .../bindings/display/panel/panel-mipi-dbi-spi.yaml | 30 ++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Powered by blists - more mailing lists