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Message-ID: <171623176256.1307290.6324910189601723683.robh@kernel.org>
Date: Mon, 20 May 2024 14:02:44 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Dmitry Rokosov <ddrokosov@...utedevices.com>
Cc: linux-arm-kernel@...ts.infradead.org, jian.hu@...ogic.com,
kernel@...rdevices.ru, linux-amlogic@...ts.infradead.org,
khilman@...libre.com, devicetree@...r.kernel.org,
neil.armstrong@...aro.org, sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, jbrunet@...libre.com,
martin.blumenstingl@...glemail.com, mturquette@...libre.com,
linux-kernel@...r.kernel.org, rockosov@...il.com,
linux-clk@...r.kernel.org
Subject: Re: [PATCH v3 2/7] dt-bindings: clock: meson: a1: pll: introduce new
syspll bindings
On Wed, 15 May 2024 21:47:25 +0300, Dmitry Rokosov wrote:
> The 'syspll' PLL is a general-purpose PLL designed specifically for the
> CPU clock. It is capable of producing output frequencies within the
> range of 768MHz to 1536MHz.
>
> The 'syspll_in' source clock is an optional parent connection from the
> peripherals clock controller.
>
> Signed-off-by: Dmitry Rokosov <ddrokosov@...utedevices.com>
> ---
> .../devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml | 9 +++++++--
> include/dt-bindings/clock/amlogic,a1-pll-clkc.h | 1 +
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@...nel.org>
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