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Date: Tue, 21 May 2024 21:10:11 +0000
From: Jonas Karlman <jonas@...boo.se>
To: Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org, Jonas
Karlman <jonas@...boo.se>
Subject: [PATCH 08/13] arm64: dts: rockchip: Add OTP device node for RK3308
The RK3308 SoC contains a controller for one-time-programmable memory,
add a device node for it.
Signed-off-by: Jonas Karlman <jonas@...boo.se>
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index c00da150a22f..6531ede13af9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -556,6 +556,30 @@ saradc: saradc@...e0000 {
status = "disabled";
};
+ otp: efuse@...10000 {
+ compatible = "rockchip,rk3308-otp";
+ reg = <0x0 0xff210000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
+ <&cru PCLK_OTP_PHY>;
+ clock-names = "otp", "apb_pclk", "phy";
+ resets = <&cru SRST_OTP_PHY>;
+ reset-names = "phy";
+
+ cpu_id: id@7 {
+ reg = <0x07 0x10>;
+ };
+
+ cpu_leakage: cpu-leakage@17 {
+ reg = <0x17 0x1>;
+ };
+
+ logic_leakage: logic-leakage@18 {
+ reg = <0x18 0x1>;
+ };
+ };
+
dmac0: dma-controller@...c0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xff2c0000 0x0 0x4000>;
--
2.43.2
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