linux-kernel - Re: [PATCH v4 4/4] arm64: dts: mediatek: mt8188: add default thermal zones

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Message-ID: <8078d106-0173-4f04-aab7-4b2726b0bb3a@baylibre.com>
Date: Tue, 21 May 2024 16:41:30 +0200
From: Julien Panis <jpanis@...libre.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Matthias Brugger
 <matthias.bgg@...il.com>, Daniel Lezcano <daniel.lezcano@...aro.org>,
 Nicolas Pitre <npitre@...libre.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v4 4/4] arm64: dts: mediatek: mt8188: add default thermal
 zones

On 5/21/24 16:19, AngeloGioacchino Del Regno wrote:
> Il 21/05/24 16:05, Julien Panis ha scritto:
>> From: Nicolas Pitre <npitre@...libre.com>
>>
>> Inspired by the vendor kernel but adapted to the upstream thermal
>> driver version.
>>
>> Signed-off-by: Nicolas Pitre <npitre@...libre.com>
>> Signed-off-by: Julien Panis <jpanis@...libre.com>
>> ---
>>   arch/arm64/boot/dts/mediatek/mt8188.dtsi | 432 +++++++++++++++++++++++++++++++
>>   1 file changed, 432 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
>> index a9f1b9db54a6..2b0f3e03acc1 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
>> @@ -12,6 +12,8 @@
>>   #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
>>   #include <dt-bindings/power/mediatek,mt8188-power.h>
>>   #include <dt-bindings/reset/mt8188-resets.h>
>> +#include <dt-bindings/thermal/thermal.h>
>> +#include <dt-bindings/thermal/mediatek,lvts-thermal.h>
>>     / {
>>       compatible = "mediatek,mt8188";
>
> ..snip..
>
>> +
>> +        gpu1-thermal {
>
> You forgot to implement my feedback to Nicolas - this must be gpu-thermal

Sorry, I did not forget. I just did not understand correctly.
Even after looking at mt8195, I thought that only the '_'
in 'cpu_big0-thermal' and 'cpu_big1-thermal' were wrong
in v3. Thanks for making it clear.

>
>> +            polling-delay = <1000>;
>> +            polling-delay-passive = <250>;
>> +            thermal-sensors = <&lvts_ap MT8188_AP_GPU1>;
>> +
>> +            trips {
>> +                gpu1_alert0: trip-alert0 {
>> +                    temperature = <85000>;
>> +                    hysteresis = <2000>;
>> +                    type = "passive";
>> +                };
>> +
>> +                gpu1_alert1: trip-alert1 {
>> +                    temperature = <95000>;
>> +                    hysteresis = <2000>;
>> +                    type = "hot";
>> +                };
>> +
>> +                gpu1_crit: trip-crit {
>> +                    temperature = <100000>;
>> +                    hysteresis = <0>;
>> +                    type = "critical";
>> +                };
>> +            };
>> +        };
>> +
>> +        gpu2-thermal {
>
> ...and for consistency with the other SoCs, this must be gpu1-thermal.

Now I think I get it, thank you.

>
>> +            polling-delay = <1000>;
>> +            polling-delay-passive = <250>;
>> +            thermal-sensors = <&lvts_ap MT8188_AP_GPU2>;
>> +
>> +            trips {
>> +                gpu2_alert0: trip-alert0 {
>> +                    temperature = <85000>;
>> +                    hysteresis = <2000>;
>> +                    type = "passive";
>> +                };
>> +
>> +                gpu2_alert1: trip-alert1 {
>> +                    temperature = <95000>;
>> +                    hysteresis = <2000>;
>> +                    type = "hot";
>> +                };
>> +
>> +                gpu2_crit: trip-crit {
>> +                    temperature = <100000>;
>> +                    hysteresis = <0>;
>> +                    type = "critical";
>> +                };
>> +            };
>> +        };
>> +
>> +        soc1-thermal {
>
> Any idea of what can "soc1" ever be? What measurement point is that?
>
> VPU? IMG? INFRA?
>
> soc1, soc2, soc3 make little sense.

No idea to be honest. I'll try to find out that information
and will change that in v5.

Julien