linux-kernel - [PATCH v6.1 16/49] x86/platform/intel-mid: Switch to new Intel CPU model defines

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Date: Tue, 21 May 2024 09:10:01 -0700
From: Tony Luck <tony.luck@...el.com>
To: andy@...nel.org
Cc: ak@...ux.intel.com,
	arnd@...db.de,
	bp@...en8.de,
	dave.hansen@...ux.intel.com,
	hpa@...or.com,
	linux-kernel@...r.kernel.org,
	mingo@...hat.com,
	mjguzik@...il.com,
	patches@...ts.linux.dev,
	peterz@...radead.org,
	rick.p.edgecombe@...el.com,
	tglx@...utronix.de,
	tony.luck@...el.com,
	trenn@...e.de,
	ubizjak@...il.com,
	x86@...nel.org
Subject: [PATCH v6.1 16/49] x86/platform/intel-mid: Switch to new Intel CPU model defines

New CPU #defines encode vendor and family as well as model.

N.B. Drop Haswell. CPU model 0x3C was included by mistake
in upstream code.

Signed-off-by: Tony Luck <tony.luck@...el.com>
Acked-by: Andy Shevchenko <andy@...nel.org>
---
 arch/x86/platform/intel-mid/intel-mid.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c
index 7be71c2cdc83..f83bbe0acd4a 100644
--- a/arch/x86/platform/intel-mid/intel-mid.c
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -22,6 +22,7 @@
 #include <asm/mpspec_def.h>
 #include <asm/hw_irq.h>
 #include <asm/apic.h>
+#include <asm/cpu_device_id.h>
 #include <asm/io_apic.h>
 #include <asm/intel-mid.h>
 #include <asm/io.h>
@@ -55,9 +56,8 @@ static void __init intel_mid_time_init(void)
 
 static void intel_mid_arch_setup(void)
 {
-	switch (boot_cpu_data.x86_model) {
-	case 0x3C:
-	case 0x4A:
+	switch (boot_cpu_data.x86_vfm) {
+	case INTEL_ATOM_SILVERMONT_MID:
 		x86_platform.legacy.rtc = 1;
 		break;
 	default:
-- 
2.45.0