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Message-ID: <61e89a48-d1f4-49f2-8893-950e7e6ba7fe@intel.com>
Date: Wed, 22 May 2024 14:25:23 -0700
From: Reinette Chatre <reinette.chatre@...el.com>
To: Tony Luck <tony.luck@...el.com>, Fenghua Yu <fenghua.yu@...el.com>, Maciej
 Wieczor-Retman <maciej.wieczor-retman@...el.com>, Peter Newman
	<peternewman@...gle.com>, James Morse <james.morse@....com>, Babu Moger
	<babu.moger@....com>, Drew Fustini <dfustini@...libre.com>, Dave Martin
	<Dave.Martin@....com>
CC: <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
	<patches@...ts.linux.dev>
Subject: Re: [PATCH v18 15/17] x86/resctrl: Fix RMID reading sanity check for
 Sub-NUMA (SNC) mode

Hi Tony,

A "Fix" in a shortlog of a kernel commit has quite a specific meaning
that I do not believe applies here. It fixes something introduced by this
patch series so "Fix" is surely suspect.

On 5/15/2024 3:23 PM, Tony Luck wrote:
> The sanity check that RMIDs are being read from a CPU listed in the
> the cpu_mask for the domain is incorrect when summing across multiple
> SNC domains. It is safe to read the RMID from any CPU that shares the
> same L3 cache instance.
> 
> Signed-off-by: Tony Luck <tony.luck@...el.com>
> ---
>  arch/x86/kernel/cpu/resctrl/monitor.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c
> index 668d2fdf58cd..e4b92c7af71d 100644
> --- a/arch/x86/kernel/cpu/resctrl/monitor.c
> +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
> @@ -15,6 +15,7 @@
>   * Software Developer Manual June 2016, volume 3, section 17.17.
>   */
>  
> +#include <linux/cacheinfo.h>
>  #include <linux/cpu.h>
>  #include <linux/module.h>
>  #include <linux/sizes.h>
> @@ -281,8 +282,18 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
>  
>  	resctrl_arch_rmid_read_context_check();
>  
> -	if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask))
> -		return -EINVAL;
> +	if (r->mon_scope == r->mon_display_scope) {
> +		if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask))
> +			return -EINVAL;
> +	} else {
> +		/*
> +		 * SNC: OK to read events on any CPU sharing same L3
> +		 * cache instance.
> +		 */
> +		if (d->display_id != get_cpu_cacheinfo_id(smp_processor_id(),
> +							  r->mon_display_scope))

By hardcoding that mon_display_scope is a cache instead of using get_domain_id_from_scope()
it seems that all pretending about being generic has just been abandoned at this point.

> +			return -EINVAL;
> +	}
>  
>  	ret = __rmid_read(rmid, eventid, &msr_val);
>  	if (ret)

Reinette

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