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Message-ID: <691ec6cf79788e6db919965f787505434b072fac.1716356681.git.Xiaojian.Du@amd.com>
Date: Wed, 22 May 2024 13:50:19 +0800
From: Xiaojian Du <Xiaojian.Du@....com>
To: <linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>
CC: <tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>,
<dave.hansen@...ux.intel.com>, <hpa@...or.com>,
<daniel.sneddon@...ux.intel.com>, <jpoimboe@...nel.org>,
<pawan.kumar.gupta@...ux.intel.com>, <sandipan.das@....com>,
<kai.huang@...el.com>, <perry.yuan@....com>, <x86@...nel.org>,
<ray.huang@....com>, <rafael@...nel.org>, Xiaojian Du <Xiaojian.Du@....com>
Subject: [PATCH v2 1/2] x86/cpufeatures: Add AMD FAST CPPC feature flag
From: Perry Yuan <perry.yuan@....com>
Some AMD Zen 4 processors support a new feature FAST CPPC which
allows for a faster CPPC loop due to internal architectual
enhancements. The goal of this faster loop is higher performance
at the same power consumption.
Reference:
See the page 99 of PPR for AMD Family 19h Model 61h rev.B1, docID 56713
Signed-off-by: Perry Yuan <perry.yuan@....com>
Signed-off-by: Xiaojian Du <Xiaojian.Du@....com>
Reviewed-by: Borislav Petkov (AMD) <bp@...en8.de>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kernel/cpu/scattered.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 3c7434329661..6c128d463a14 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -470,6 +470,7 @@
#define X86_FEATURE_BHI_CTRL (21*32+ 2) /* "" BHI_DIS_S HW control available */
#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */
#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
+#define X86_FEATURE_FAST_CPPC (21*32 + 5) /* "" AMD Fast CPPC */
/*
* BUG word(s)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index af5aa2c754c2..9c273c231f56 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -51,6 +51,7 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 },
{ X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 },
{ X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 },
+ { X86_FEATURE_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 },
{ 0, 0, 0, 0, 0 }
};
--
2.34.1
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