linux-kernel - Re: [PATCH 1/1] RISC-V: KVM: No need to use mask when hart-index-bit is 0

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Wed, 22 May 2024 11:00:12 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Yong-Xuan Wang <yongxuan.wang@...ive.com>
Cc: linux-riscv@...ts.infradead.org, kvm-riscv@...ts.infradead.org, 
	greentime.hu@...ive.com, vincent.chen@...ive.com, Anup Patel <anup@...infault.org>, 
	Atish Patra <atishp@...shpatra.org>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, kvm@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] RISC-V: KVM: No need to use mask when hart-index-bit
 is 0

On Mon, Apr 15, 2024 at 02:49:04PM GMT, Yong-Xuan Wang wrote:
> When the maximum hart number within groups is 1, hart-index-bit is set to
> 0. Consequently, there is no need to restore the hart ID from IMSIC
> addresses and hart-index-bit settings. Currently, QEMU and kvmtool do not
> pass correct hart-index-bit values when the maximum hart number is a
> power of 2, thereby avoiding this issue. Corresponding patches for QEMU
> and kvmtool will also be dispatched.
> 
> Fixes: 89d01306e34d ("RISC-V: KVM: Implement device interface for AIA irqchip")
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@...ive.com>
> ---
>  arch/riscv/kvm/aia_device.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c
> index 0eb689351b7d..5cd407c6a8e4 100644
> --- a/arch/riscv/kvm/aia_device.c
> +++ b/arch/riscv/kvm/aia_device.c
> @@ -237,10 +237,11 @@ static gpa_t aia_imsic_ppn(struct kvm_aia *aia, gpa_t addr)
>  
>  static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr)
>  {
> -	u32 hart, group = 0;
> +	u32 hart = 0, group = 0;
>  
> -	hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &
> -		GENMASK_ULL(aia->nr_hart_bits - 1, 0);
> +	if (aia->nr_hart_bits)
> +		hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &
> +		       GENMASK_ULL(aia->nr_hart_bits - 1, 0);
>  	if (aia->nr_group_bits)
>  		group = (addr >> aia->nr_group_shift) &
>  			GENMASK_ULL(aia->nr_group_bits - 1, 0);
> -- 
> 2.17.1
>

Reviewed-by: Andrew Jones <ajones@...tanamicro.com>