lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d1c3dd0c-9f24-4d0f-b15a-b727522a9662@kernel.org>
Date: Thu, 23 May 2024 08:39:31 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Kim Seer Paller <kimseer.paller@...log.com>,
 linux-kernel@...r.kernel.org, linux-iio@...r.kernel.org,
 devicetree@...r.kernel.org
Cc: Jonathan Cameron <jic23@...nel.org>, David Lechner
 <dlechner@...libre.com>, Lars-Peter Clausen <lars@...afoo.de>,
 Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
 Dimitri Fedrau <dima.fedrau@...il.com>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Michael Hennerich <michael.hennerich@...log.com>,
 Nuno Sá <noname.nuno@...il.com>
Subject: Re: [PATCH v2 3/5] dt-bindings: iio: dac: Add adi,ltc2664.yaml

On 23/05/2024 05:19, Kim Seer Paller wrote:
> Add documentation for ltc2664.
> 


> +
> +  ref-supply:
> +    description:
> +      Reference Input/Output. The voltage at the REF pin sets the full-scale
> +      range of all channels. If not provided the internal reference is used and
> +      also provided on the VREF pin.
> +
> +  clr-gpios:
> +    description:
> +      Active-low Asynchronous Clear Input. A logic low at this level-triggered
> +      input clears the part to the reset code and range determined by the
> +      hardwired option chosen using the MSPAN pins. The control registers are
> +      cleared to zero.

So this is a reset gpio?

> +    maxItems: 1
> +
> +  adi,manual-span-operation-config:
> +    description:
> +      This property must mimic the MSPAN pin configurations. By tying the MSPAN
> +      pins (MSP2, MSP1 and MSP0) to GND and/or VCC, any output range can be
> +      hardware-configured with different mid-scale or zero-scale reset options.
> +      The hardware configuration is latched during power on reset for proper
> +      operation.
> +        0 - MPS2=GND, MPS1=GND, MSP0=GND
> +        1 - MPS2=GND, MPS1=GND, MSP0=VCC
> +        2 - MPS2=GND, MPS1=VCC, MSP0=GND
> +        3 - MPS2=GND, MPS1=VCC, MSP0=VCC
> +        4 - MPS2=VCC, MPS1=GND, MSP0=GND
> +        5 - MPS2=VCC, MPS1=GND, MSP0=VCC
> +        6 - MPS2=VCC, MPS1=VCC, MSP0=GND
> +        7 - MPS2=VCC, MPS1=VCC, MSP0=VCC (enables SoftSpan feature)
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1, 2, 3, 4, 5, 6, 7]
> +    default: 7
> +
> +  io-channels:
> +    description:
> +      Analog multiplexer output. VOUT0-VOUT3, MUXIN0-MUXIN3, REFLO, REF, V+, V-,

That's not output but input.

> +      and a temperature monitor output can be internally routed to the MUXOUT pin.

Needs maxItems

> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 0
> +


Best regards,
Krzysztof


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ