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Message-Id: <43537D0D-0D89-404C-B0E0-E9182E2BD97B@linux.vnet.ibm.com>
Date: Thu, 23 May 2024 19:28:18 +0530
From: Athira Rajeev <atrajeev@...ux.vnet.ibm.com>
To: Christophe Leroy <christophe.leroy@...roup.eu>
Cc: "acme@...nel.org" <acme@...nel.org>, "jolsa@...nel.org" <jolsa@...nel.org>,
        "adrian.hunter@...el.com" <adrian.hunter@...el.com>,
        "irogers@...gle.com" <irogers@...gle.com>,
        "namhyung@...nel.org" <namhyung@...nel.org>,
        "segher@...nel.crashing.org" <segher@...nel.crashing.org>,
        "linux-perf-users@...r.kernel.org" <linux-perf-users@...r.kernel.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "maddy@...ux.ibm.com" <maddy@...ux.ibm.com>,
        "kjain@...ux.ibm.com" <kjain@...ux.ibm.com>,
        "disgoel@...ux.vnet.ibm.com" <disgoel@...ux.vnet.ibm.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "akanksha@...ux.ibm.com" <akanksha@...ux.ibm.com>
Subject: Re: [PATCH V2 6/9] tools/perf: Update instruction tracking for
 powerpc



> On 7 May 2024, at 3:22 PM, Christophe Leroy <christophe.leroy@...roup.eu> wrote:
> 
> 
> 
> Le 06/05/2024 à 14:19, Athira Rajeev a écrit :
>> Add instruction tracking function "update_insn_state_powerpc" for
>> powerpc. Example sequence in powerpc:
>> 
>> ld      r10,264(r3)
>> mr      r31,r3
>> <<after some sequence>
>> ld      r9,312(r31)
> 
> Your approach looks fragile.
> 
> mr is a simplified instruction which in fact is  "or r31, r3, r3"
> 
> By the way, the compiler sometimes does it different, like below:
> 
> lwz r10,264(r3)
> addi r31, r3, 312
> lwz r9, 0(r31)
> 
> And what about sequences with lwzu ?
Hi Christophe,

This patch added “mr”. In next patch in same series, add instruction also is added to instruction tracking.
I will be posting a V3 with some changes to the logic for annotating add instructions.

Thanks
Athira
> 
>> 
>> Consider ithe sample is pointing to: "ld r9,312(r31)".
>> Here the memory reference is hit at "312(r31)" where 312 is the offset
>> and r31 is the source register. Previous instruction sequence shows that
>> register state of r3 is moved to r31. So to identify the data type for r31
>> access, the previous instruction ("mr") needs to be tracked and the
>> state type entry has to be updated. Current instruction tracking support
>> in perf tools infrastructure is specific to x86. Patch adds this for
>> powerpc and adds "mr" instruction to be tracked.
>> 
>> Signed-off-by: Athira Rajeev <atrajeev@...ux.vnet.ibm.com>


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