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Message-ID: <20240524090514.152727-6-s-vadapalli@ti.com>
Date: Fri, 24 May 2024 14:35:12 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: <nm@...com>, <vigneshr@...com>, <afd@...com>, <kristo@...nel.org>,
<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<rogerq@...nel.org>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <u-kumar1@...com>,
<danishanwar@...com>, <srk@...com>, <s-vadapalli@...com>
Subject: [PATCH v3 5/7] arm64: dts: ti: k3-j722s: Add lane mux for Serdes1
The Serdes1 instance of Serdes on J722S SoC can be muxed between PCIe0
and SGMII1. Update the "serdes_ln_ctrl" node adding support for the lane
mux of Serdes1. Additionally, set the default muxing for Serdes1 Lane0 to
PCIe0.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
---
Current patch is v1. No changelog.
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 3 ++-
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 5 +++--
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index a3bda39cc223..16c6ab8ee07e 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -401,7 +401,8 @@ &sdhci1 {
};
&serdes_ln_ctrl {
- idle-states = <J722S_SERDES0_LANE0_USB>;
+ idle-states = <J722S_SERDES0_LANE0_USB>,
+ <J722S_SERDES1_LANE0_PCIE0_LANE0>;
};
&serdes0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index b069cecebfd9..48b77e476c77 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -96,8 +96,9 @@ usb1: usb@...00000{
&main_conf {
serdes_ln_ctrl: mux-controller@...0 {
compatible = "reg-mux";
- reg = <0x4080 0x4>;
+ reg = <0x4080 0x14>;
#mux-control-cells = <1>;
- mux-reg-masks = <0x0 0x3>; /* SERDES0 lane0 select */
+ mux-reg-masks = <0x0 0x3>, /* SERDES0 lane0 select */
+ <0x10 0x3>; /* SERDES1 lane0 select */
};
};
--
2.40.1
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