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Message-Id: <20240527150224.1953969-8-obitton@habana.ai> Date: Mon, 27 May 2024 18:02:24 +0300 From: Ofir Bitton <obitton@...ana.ai> To: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org Cc: Tal Cohen <talcohen@...ana.ai> Subject: [PATCH 8/8] accel/habanalabs: disable EQ interrupt after disabling pci From: Tal Cohen <talcohen@...ana.ai> When sending disable pci msg towards firmware, there is a possibility that an EQ packet is already pending, disabling EQ interrupt will prevent this from happening. The interrupt will be re-enabled after reset. Signed-off-by: Tal Cohen <talcohen@...ana.ai> Reviewed-by: Ofir Bitton <obitton@...ana.ai> --- drivers/accel/habanalabs/common/device.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/accel/habanalabs/common/device.c b/drivers/accel/habanalabs/common/device.c index 5ca7014def00..78e65c6b76a7 100644 --- a/drivers/accel/habanalabs/common/device.c +++ b/drivers/accel/habanalabs/common/device.c @@ -1502,10 +1502,11 @@ static void send_disable_pci_access(struct hl_device *hdev, u32 flags) if (hl_fw_send_pci_access_msg(hdev, CPUCP_PACKET_DISABLE_PCI_ACCESS, 0x0)) return; - /* verify that last EQs are handled before disabled is set */ + /* disable_irq also generates sync irq, this verifies that last EQs are handled + * before disabled is set. The IRQ will be enabled again in request_irq call. + */ if (hdev->cpu_queues_enable) - synchronize_irq(pci_irq_vector(hdev->pdev, - hdev->asic_prop.eq_interrupt_id)); + disable_irq(pci_irq_vector(hdev->pdev, hdev->asic_prop.eq_interrupt_id)); } } -- 2.34.1
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