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Message-ID: <z5niadir2squ2hxthp7t4f3eijczd26q4l5l6sk6qd4zzafiah@epcsoym66hcq>
Date: Mon, 27 May 2024 12:12:00 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Vinod Koul <vkoul@...nel.org>, 
	Kishon Vijay Abraham I <kishon@...nel.org>, linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, Kuogee Hsieh <quic_khsieh@...cinc.com>
Subject: Re: [PATCH 1/3] phy: qcom-qmp: qserdes-txrx: Add missing registers
 offsets

On Mon, May 27, 2024 at 10:20:35AM +0300, Abel Vesa wrote:
> Currently, the x1e80100 uses pure V6 register offsets for DP part of the
> combo PHY. This hasn't been an issue because external DP is not yet
> enabled on any of the boards yet. But in order to enabled it, all these

Nit: '...in order to enable it'

> new V6 N4 register offsets are needed. So add them.
> 
> Fixes: 762c3565f3c8 ("phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets")
> Co-developed-by: Kuogee Hsieh <quic_khsieh@...cinc.com>
> Signed-off-by: Kuogee Hsieh <quic_khsieh@...cinc.com>
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 


Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

-- 
With best wishes
Dmitry

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