linux-kernel - Re: [PATCH v2 3/6] dt-bindings: crypto: Add Texas Instruments MCRC64

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87ikyza7iq.fsf@kamlesh.i-did-not-set--mail-host-address--so-tickle-me>
Date: Mon, 27 May 2024 15:41:57 +0530
From: Kamlesh Gurudasani <kamlesh@...com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Conor Dooley
	<conor@...nel.org>
CC: Herbert Xu <herbert@...dor.apana.org.au>,
        "David S. Miller"
	<davem@...emloft.net>,
        Rob Herring <robh+dt@...nel.org>,
        "Krzysztof
 Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley
	<conor+dt@...nel.org>, Nishanth Menon <nm@...com>,
        Vignesh Raghavendra
	<vigneshr@...com>,
        Tero Kristo <kristo@...nel.org>,
        Catalin Marinas
	<catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Maxime Coquelin
	<mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        <linux-crypto@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH v2 3/6] dt-bindings: crypto: Add Texas Instruments MCRC64

Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> writes:

> This message was sent from outside of Texas Instruments. 
> Do not click links or open attachments unless you recognize the source of this email and know the content is safe. If you wish
> to report this message to IT Security, please forward the message as an attachment to phishing@...t.ti.com 
>  
> On 27/05/2024 10:25, Kamlesh Gurudasani wrote:
>> Conor Dooley <conor@...nel.org> writes:
>> 
>>> On Fri, Aug 11, 2023 at 04:34:33PM +0100, Conor Dooley wrote:
>>>> On Fri, Aug 11, 2023 at 12:58:50AM +0530, Kamlesh Gurudasani wrote:
>>>>> Add binding for Texas Instruments MCRC64
>>>>>
>>>>> MCRC64 engine calculates 64-bit cyclic redundancy checks (CRC)
>>>>> according to the ISO 3309 standard.
>>>>>
>>>>> The ISO 3309 64-bit CRC model parameters are as follows:
>>>>>     Generator Polynomial: x^64 + x^4 + x^3 + x + 1
>>>>>     Polynomial Value: 0x000000000000001B
>>>>>     Initial value: 0x0000000000000000
>>>>>     Reflected Input: False
>>>>>     Reflected Output: False
>>>>>     Xor Final: 0x0000000000000000
>>>>>
>>>>> Signed-off-by: Kamlesh Gurudasani <kamlesh@...com>
>>>>> ---
>>>>>  Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml | 47 +++++++++++++++++++++++++++++++++++++++++++++++
>>>>>  MAINTAINERS                                             |  5 +++++
>>>>>  2 files changed, 52 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml b/Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml
>>>>> new file mode 100644
>>>>> index 000000000000..38bc7efebd68
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml
>>>>> @@ -0,0 +1,47 @@
>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>>> +%YAML 1.2
>>>>> +---
>>>>> +$id: https://urldefense.com/v3/__http://devicetree.org/schemas/crypto/ti,mcrc64.yaml*__;Iw!!G3vK!Qw75749h2ysFlROkyfLIUT9MGWlHfBEvPAbLVjScJXCPJ7vbwgxH-8hNWlJGBXGwz9Ny47eQi2mPS5R6La54vZo$
>>>>> +$schema: https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!G3vK!Qw75749h2ysFlROkyfLIUT9MGWlHfBEvPAbLVjScJXCPJ7vbwgxH-8hNWlJGBXGwz9Ny47eQi2mPS5R6P2LNJCQ$
>>>>> +
>>>>> +title: Texas Instruments MCRC64
>>>>> +
>>>>> +description: The MCRC64 engine calculates 64-bit cyclic redundancy checks
>>>>
>>>> A newline after "description" please.
>>>>
>>>>> +  (CRC) according to the ISO 3309 standard.
>>>>> +
>>>>> +maintainers:
>>>>> +  - Kamlesh Gurudasani <kamlesh@...com>
>>>>> +
>>>>> +properties:
>>>>> +  compatible:
>>>>> +    const: ti,am62-mcrc64
>>>>
>>>> Is the am62 an SoC or a family of SoCs? I googled a wee bit for am62 &
>>>> there seems to be an am625 and an am623?
>>>
>>> Or is it an am62p5, in which case the compatible should contain
>>> ti,am62p5 I suppose. Sorry for my confusion here, its not really clear
>>> me too since I've been seeing many different-but-similar product names
>>> the last few days.
>>>
>>> Thanks,
>>> Conor.
>>>
>> Hi Conor,
>> 
>> Thanks for the review.
>> 
>> am62 is family of SOCs.
>> 
>> All devices under this family, like am623/5/p5 and etc, have MCRC64.
>> 
>> I have kept the naming convention similar to SA2UL/SA3UL[0].
>> 
>> [0] https://urldefense.com/v3/__https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml*L18__;Iw!!G3vK!Qw75749h2ysFlROkyfLIUT9MGWlHfBEvPAbLVjScJXCPJ7vbwgxH-8hNWlJGBXGwz9Ny47eQi2mPS5R6afCEd8s$
>
> Usual answer is: no families. There are exceptions, though, so is this
> case on the exception list?
Okay, will use ti,am625-mcrc64 as compatible and as fallback compatible for
other devices. I hope that is right.

Thanks.

Kamlesh
>
> https://urldefense.com/v3/__https://elixir.bootlin.com/linux/v6.10-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst*L42__;Iw!!G3vK!Qw75749h2ysFlROkyfLIUT9MGWlHfBEvPAbLVjScJXCPJ7vbwgxH-8hNWlJGBXGwz9Ny47eQi2mPS5R6WaRq1VM$
>
> P.S. Your email client added some weird subject prefix - please fix it.
Thanks for bringing this to my notice, Will fix it.
>
>
>
> Best regards,
> Krzysztof