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Message-Id: <20240527-sg2002-v1-0-1b6cb38ce8f4@bootlin.com>
Date: Mon, 27 May 2024 12:28:16 +0200
From: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto <inochiama@...look.com>,
Chao Wei <chao.wei@...hgo.com>
Cc: Albert Ou <aou@...s.berkeley.edu>, Palmer Dabbelt <palmer@...belt.com>,
Samuel Holland <samuel.holland@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Miquèl Raynal <miquel.raynal@...tlin.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Thomas Bonnefille <thomas.bonnefille@...tlin.com>
Subject: [PATCH 0/5] Add board support for Sipeed LicheeRV Nano
The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds
minimal device tree files for this board to make it boot to a basic
shell.
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
---
Thomas Bonnefille (5):
dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
dt-bindings: timer: Add SOPHGO SG2002 clint
dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
riscv: dts: sophgo: Add initial SG2002 SoC device tree
riscv: dts: sophgo: Add LicheeRV Nano board device tree
.../interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
.../devicetree/bindings/riscv/sophgo.yaml | 4 +++
.../devicetree/bindings/timer/sifive,clint.yaml | 1 +
arch/riscv/boot/dts/sophgo/Makefile | 1 +
.../boot/dts/sophgo/sg2002-lichee-rv-nano.dts | 25 ++++++++++++++++++
arch/riscv/boot/dts/sophgo/sg2002.dtsi | 30 ++++++++++++++++++++++
6 files changed, 62 insertions(+)
---
base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
change-id: 20240515-sg2002-93dce1d263be
Best regards,
--
Thomas Bonnefille <thomas.bonnefille@...tlin.com>
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