linux-kernel - Re: (subset) [PATCH v2 00/21] Add PCIe bridge node in DT for Qcom SoCs

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Message-ID: <171677884197.490947.9756729539444770432.b4-ty@kernel.org>
Date: Sun, 26 May 2024 22:00:30 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>,
	cros-qcom-dts-watchers@...omium.org,
	Rob Herring <robh@...nel.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Neil Armstrong <neil.armstrong@...aro.org>
Subject: Re: (subset) [PATCH v2 00/21] Add PCIe bridge node in DT for Qcom SoCs


On Thu, 21 Mar 2024 16:46:20 +0530, Manivannan Sadhasivam wrote:
> On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
> for each controller instance. Hence, this series adds a DT node for the
> PCIe bridges across all SoCs.
> 
> There is no functionality change with this series, but the PCIe bridge
> representation in DT will be necessary to add the DT node for the client
> devices like the one proposed in power sequencing series [1].
> 
> [...]

Applied, thanks!

[21/21] arm64: dts: qcom: sm8650: Use "pcie" as the node name instead of "pci"
        commit: 2f2120a15251097f9afcab5b4db7894ce03b2933

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>