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Message-ID: <9d93682c-5da4-43d2-a9fb-f05d3596e066@linaro.org>
Date: Mon, 27 May 2024 14:24:01 +0200
From: Philippe Mathieu-Daudé <philmd@...aro.org>
To: Jiaxun Yang <jiaxun.yang@...goat.com>,
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
 Serge Semin <fancer.lancer@...il.com>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Thomas Gleixner <tglx@...utronix.de>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 7/7] clocksource: mips-gic-timer: Correct sched_clock
 width

On 11/5/24 18:00, Jiaxun Yang wrote:
> Counter width of GIC is configurable and can be read from a
> register.
> 
> Use width value from the register for sched_clock.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> ---
>   drivers/clocksource/mips-gic-timer.c | 14 +++++++-------
>   1 file changed, 7 insertions(+), 7 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@...aro.org>


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