linux-kernel - Re: [PATCH v4 08/14] clocksource: mips-gic-timer: Enable counter when CPUs start

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <06b06b65-8eb7-43f6-8fb5-e5663876edb5@linaro.org>
Date: Mon, 27 May 2024 14:31:29 +0200
From: Philippe Mathieu-Daudé <philmd@...aro.org>
To: Aleksandar Rikalo <aleksandar.rikalo@...mia.com>,
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: Aleksandar Rikalo <arikalo@...il.com>, Chao-ying Fu <cfu@...ecomp.com>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Geert Uytterhoeven <geert@...ux-m68k.org>, Greg Ungerer <gerg@...nel.org>,
 Hauke Mehrtens <hauke@...ke-m.de>,
 Ilya Lipnitskiy <ilya.lipnitskiy@...il.com>,
 Jiaxun Yang <jiaxun.yang@...goat.com>, linux-kernel@...r.kernel.org,
 linux-mips@...r.kernel.org, Marc Zyngier <maz@...nel.org>,
 Paul Burton <paulburton@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
 Serge Semin <fancer.lancer@...il.com>, Thomas Gleixner <tglx@...utronix.de>,
 Tiezhu Yang <yangtiezhu@...ngson.cn>
Subject: Re: [PATCH v4 08/14] clocksource: mips-gic-timer: Enable counter when
 CPUs start

On 11/5/24 12:43, Aleksandar Rikalo wrote:
> From: Paul Burton <paulburton@...nel.org>
> 
> In multi-cluster MIPS I6500 systems we have a GIC in each cluster, each
> with its own counter. When a cluster powers up the counter will be
> stopped, with the COUNTSTOP bit set in the GIC_CONFIG register.
> 
> In single cluster systems it has been fine for us to clear COUNTSTOP
> once in gic_clocksource_of_init() in order to start the counter, since
> with only one cluster we know that we won't be resetting that cluster's
> GIC at any point (ignoring suspend/resume cycles which would need to
> handle clearing COUNTSTOP in the resume path). Once we support
> multi-cluster systems this will only have started the counter in the
> boot cluster, and any CPUs in other clusters will find their counter
> stopped which will break the GIC clock_event_device.
> 
> Resolve this by having CPUs clear the COUNTSTOP bit when they come
> online, using the existing gic_starting_cpu() CPU hotplug callback. This
> will allow CPUs in secondary clusters to ensure that the cluster's GIC
> counter is running as expected.
> 
> Signed-off-by: Paul Burton <paulburton@...nel.org>
> Signed-off-by: Chao-ying Fu <cfu@...ecomp.com>
> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@...mia.com>
> Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@...mia.com>
> ---
>   drivers/clocksource/mips-gic-timer.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@...aro.org>